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pinctrl: amd: Drop pull up select configuration

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commit 3f62312d04 upstream.

pinctrl-amd currently tries to program bit 19 of all GPIOs to select
either a 4kΩ or 8hΩ pull up, but this isn't what bit 19 does.  Bit
19 is marked as reserved, even in the latest platforms documentation.

Drop this programming functionality.

Tested-by: Jan Visser <starquake@linuxeverywhere.org>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Link: https://lore.kernel.org/r/20230705133005.577-4-mario.limonciello@amd.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Mario Limonciello 2023-07-05 08:30:04 -05:00 committed by Greg Kroah-Hartman
parent 326b3f17be
commit dce19c966d
2 changed files with 4 additions and 13 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

16
drivers/pinctrl/pinctrl-amd.c
View file

@ -209,7 +209,6 @@ static void amd_gpio_dbg_show(struct seq_file *s, struct gpio_chip *gc)
char *pin_sts;
char *interrupt_sts;
char *wake_sts;
char *pull_up_sel;
char *orientation;
char debounce_value[40];
char *debounce_enable;
@ -317,14 +316,9 @@ static void amd_gpio_dbg_show(struct seq_file *s, struct gpio_chip *gc)
seq_printf(s, " %s|", wake_sts);
if (pin_reg & BIT(PULL_UP_ENABLE_OFF)) {
if (pin_reg & BIT(PULL_UP_SEL_OFF))
pull_up_sel = "8k";
else
pull_up_sel = "4k";
seq_printf(s, "%s ↑|",
pull_up_sel);
seq_puts(s, " ↑ |");
} else if (pin_reg & BIT(PULL_DOWN_ENABLE_OFF)) {
seq_puts(s, " ↓|");
seq_puts(s, " ↓ |");
} else {
seq_puts(s, " |");
}
@ -751,7 +745,7 @@ static int amd_pinconf_get(struct pinctrl_dev *pctldev,
break;
case PIN_CONFIG_BIAS_PULL_UP:
arg = (pin_reg >> PULL_UP_SEL_OFF) & (BIT(0) | BIT(1));
arg = (pin_reg >> PULL_UP_ENABLE_OFF) & BIT(0);
break;
case PIN_CONFIG_DRIVE_STRENGTH:
@ -798,10 +792,8 @@ static int amd_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
break;
case PIN_CONFIG_BIAS_PULL_UP:
pin_reg &= ~BIT(PULL_UP_SEL_OFF);
pin_reg |= (arg & BIT(0)) << PULL_UP_SEL_OFF;
pin_reg &= ~BIT(PULL_UP_ENABLE_OFF);
pin_reg |= ((arg>>1) & BIT(0)) << PULL_UP_ENABLE_OFF;
pin_reg |= (arg & BIT(0)) << PULL_UP_ENABLE_OFF;
break;
case PIN_CONFIG_DRIVE_STRENGTH:

1
drivers/pinctrl/pinctrl-amd.h
View file

@ -36,7 +36,6 @@
#define WAKE_CNTRL_OFF_S4 15
#define PIN_STS_OFF 16
#define DRV_STRENGTH_SEL_OFF 17
#define PULL_UP_SEL_OFF 19
#define PULL_UP_ENABLE_OFF 20
#define PULL_DOWN_ENABLE_OFF 21
#define OUTPUT_VALUE_OFF 22