From dd5c160655e24c1a86b1f23e870b69f6aaa80646 Mon Sep 17 00:00:00 2001 From: Ard Biesheuvel Date: Tue, 3 Dec 2019 15:23:03 +0000 Subject: [PATCH] dt: amd-seattle: add a description of the PCIe SMMU Add a description of the SMMU that covers the PCIe host bridge on AMD Seattle. Signed-off-by: Ard Biesheuvel Signed-off-by: Arnd Bergmann --- arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi index 9fa6890fca35..124e58a76be0 100644 --- a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi +++ b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi @@ -239,6 +239,16 @@ <0x02000000 0x00 0x40000000 0x00 0x40000000 0x00 0x80000000>, /* 64-bit MMIO (size= 508G) */ <0x03000000 0x01 0x00000000 0x01 0x00000000 0x7f 0x00000000>; + iommu-map = <0x0 &pcie_smmu 0x0 0x10000>; + }; + + pcie_smmu: iommu@e0a00000 { + compatible = "arm,mmu-401"; + reg = <0 0xe0a00000 0 0x10000>; + #global-interrupts = <1>; + interrupts = <0 333 4>, <0 333 4>; + #iommu-cells = <1>; + dma-coherent; }; /* Perf CCN504 PMU */