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mlxsw: reg: add rdpm register
Add rdpm definition - router DSCP to priority mapping register. This register will be utilized later to align the default mapping between packet DSCP and switch-priority to the kernel's mapping between packet priority and skb priority. This is the first non-bit indexed register where the entries are arranged in descending order, i.e., entry at offset 0 matches configuration for dscp[63]. As a result, the item's step is converted into a signed variable to support descending arrays [where step would be negative]. Signed-off-by: Yuval Mintz <yuvalm@mellanox.com> Signed-off-by: Nogah Frankel <nogahf@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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1988c79578
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2 changed files with 38 additions and 1 deletions
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@ -42,7 +42,7 @@
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struct mlxsw_item {
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unsigned short offset; /* bytes in container */
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unsigned short step; /* step in bytes for indexed items */
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short step; /* step in bytes for indexed items */
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unsigned short in_step_offset; /* offset within one step */
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unsigned char shift; /* shift in bits */
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unsigned char element_size; /* size of element in bit array */
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@ -4827,6 +4827,42 @@ static inline void mlxsw_reg_ratr_counter_pack(char *payload, u64 counter_index,
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mlxsw_reg_ratr_counter_set_type_set(payload, set_type);
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}
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/* RDPM - Router DSCP to Priority Mapping
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* --------------------------------------
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* Controls the mapping from DSCP field to switch priority on routed packets
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*/
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#define MLXSW_REG_RDPM_ID 0x8009
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#define MLXSW_REG_RDPM_BASE_LEN 0x00
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#define MLXSW_REG_RDPM_DSCP_ENTRY_REC_LEN 0x01
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#define MLXSW_REG_RDPM_DSCP_ENTRY_REC_MAX_COUNT 64
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#define MLXSW_REG_RDPM_LEN 0x40
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#define MLXSW_REG_RDPM_LAST_ENTRY (MLXSW_REG_RDPM_BASE_LEN + \
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MLXSW_REG_RDPM_LEN - \
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MLXSW_REG_RDPM_DSCP_ENTRY_REC_LEN)
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MLXSW_REG_DEFINE(rdpm, MLXSW_REG_RDPM_ID, MLXSW_REG_RDPM_LEN);
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/* reg_dscp_entry_e
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* Enable update of the specific entry
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* Access: Index
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*/
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MLXSW_ITEM8_INDEXED(reg, rdpm, dscp_entry_e, MLXSW_REG_RDPM_LAST_ENTRY, 7, 1,
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-MLXSW_REG_RDPM_DSCP_ENTRY_REC_LEN, 0x00, false);
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/* reg_dscp_entry_prio
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* Switch Priority
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* Access: RW
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*/
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MLXSW_ITEM8_INDEXED(reg, rdpm, dscp_entry_prio, MLXSW_REG_RDPM_LAST_ENTRY, 0, 4,
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-MLXSW_REG_RDPM_DSCP_ENTRY_REC_LEN, 0x00, false);
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static inline void mlxsw_reg_rdpm_pack(char *payload, unsigned short index,
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u8 prio)
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{
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mlxsw_reg_rdpm_dscp_entry_e_set(payload, index, 1);
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mlxsw_reg_rdpm_dscp_entry_prio_set(payload, index, prio);
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}
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/* RICNT - Router Interface Counter Register
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* -----------------------------------------
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* The RICNT register retrieves per port performance counters
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@ -7640,6 +7676,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
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MLXSW_REG(rtar),
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MLXSW_REG(ratr),
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MLXSW_REG(rtdp),
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MLXSW_REG(rdpm),
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MLXSW_REG(ricnt),
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MLXSW_REG(rrcr),
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MLXSW_REG(ralta),
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