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media: i2c: imx290: Support 60fps in 2 lane operation
Commit "97589ad61c73 media: i2c: imx290: Add support for 2 data lanes" added support for running in two lane mode (instead of 4), but without changing the link frequency that resulted in a max of 30fps. Commit "98e0500eadb7 media: i2c: imx290: Add configurable link frequency and pixel rate" then doubled the link frequency when in 2 lane mode, but didn't undo the correction for running at only 30fps, just extending horizontal blanking instead. Remove the 30fps limit on 2 lane by correcting the register config in accordance with the datasheet for 60fps operation over 2 lanes. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
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parent
bc35f9a21a
commit
de39557748
1 changed files with 3 additions and 14 deletions
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@ -385,7 +385,7 @@ static const struct imx290_mode imx290_modes_2lanes[] = {
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{
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{
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.width = 1920,
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.width = 1920,
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.height = 1080,
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.height = 1080,
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.hmax = 4400,
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.hmax = 2200,
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.link_freq_index = FREQ_INDEX_1080P,
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.link_freq_index = FREQ_INDEX_1080P,
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.data = imx290_1080p_settings,
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.data = imx290_1080p_settings,
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.data_size = ARRAY_SIZE(imx290_1080p_settings),
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.data_size = ARRAY_SIZE(imx290_1080p_settings),
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@ -393,7 +393,7 @@ static const struct imx290_mode imx290_modes_2lanes[] = {
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{
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{
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.width = 1280,
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.width = 1280,
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.height = 720,
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.height = 720,
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.hmax = 6600,
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.hmax = 3300,
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.link_freq_index = FREQ_INDEX_720P,
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.link_freq_index = FREQ_INDEX_720P,
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.data = imx290_720p_settings,
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.data = imx290_720p_settings,
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.data_size = ARRAY_SIZE(imx290_720p_settings),
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.data_size = ARRAY_SIZE(imx290_720p_settings),
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@ -544,21 +544,10 @@ static int imx290_set_register_array(struct imx290 *imx290,
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static int imx290_set_data_lanes(struct imx290 *imx290)
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static int imx290_set_data_lanes(struct imx290 *imx290)
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{
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{
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int ret = 0;
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int ret = 0;
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u32 frsel;
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switch (imx290->nlanes) {
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case 2:
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default:
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frsel = 0x02;
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break;
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case 4:
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frsel = 0x01;
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break;
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}
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imx290_write(imx290, IMX290_PHY_LANE_NUM, imx290->nlanes - 1, &ret);
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imx290_write(imx290, IMX290_PHY_LANE_NUM, imx290->nlanes - 1, &ret);
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imx290_write(imx290, IMX290_CSI_LANE_MODE, imx290->nlanes - 1, &ret);
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imx290_write(imx290, IMX290_CSI_LANE_MODE, imx290->nlanes - 1, &ret);
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imx290_write(imx290, IMX290_FR_FDG_SEL, frsel, &ret);
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imx290_write(imx290, IMX290_FR_FDG_SEL, 0x01, &ret);
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return ret;
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return ret;
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}
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}
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