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powerpc: Implement load_unaligned_zeropad
Implement a bi-arch and bi-endian version of load_unaligned_zeropad. Since the fallback case is so rare, a userspace test harness was used to test this on ppc64le, ppc64 and ppc32: http://ozlabs.org/~anton/junkcode/test_load_unaligned_zeropad.c It uses mprotect to force a SEGV across a page boundary, and a SEGV handler to lookup the exception tables and run the fixup routine. It also compares the result against a normal load. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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@ -116,4 +116,44 @@ static inline unsigned long prep_zero_mask(unsigned long a, unsigned long bits,
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#endif
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static inline unsigned long load_unaligned_zeropad(const void *addr)
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{
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unsigned long ret, offset, tmp;
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asm(
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"1: " PPC_LL "%[ret], 0(%[addr])\n"
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"2:\n"
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".section .fixup,\"ax\"\n"
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"3: "
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#ifdef __powerpc64__
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"clrrdi %[tmp], %[addr], 3\n\t"
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"clrlsldi %[offset], %[addr], 61, 3\n\t"
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"ld %[ret], 0(%[tmp])\n\t"
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#ifdef __BIG_ENDIAN__
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"sld %[ret], %[ret], %[offset]\n\t"
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#else
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"srd %[ret], %[ret], %[offset]\n\t"
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#endif
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#else
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"clrrwi %[tmp], %[addr], 2\n\t"
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"clrlslwi %[offset], %[addr], 30, 3\n\t"
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"lwz %[ret], 0(%[tmp])\n\t"
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#ifdef __BIG_ENDIAN__
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"slw %[ret], %[ret], %[offset]\n\t"
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#else
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"srw %[ret], %[ret], %[offset]\n\t"
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#endif
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#endif
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"b 2b\n"
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".previous\n"
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".section __ex_table,\"a\"\n\t"
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PPC_LONG_ALIGN "\n\t"
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PPC_LONG "1b,3b\n"
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".previous"
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: [tmp] "=&b" (tmp), [offset] "=&r" (offset), [ret] "=&r" (ret)
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: [addr] "b" (addr), "m" (*(unsigned long *)addr));
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return ret;
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}
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#endif /* _ASM_WORD_AT_A_TIME_H */
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