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MIPS: uasm: Add drotr32 and uasm_i_drotr_safe.
Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: wim@iguana.be Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1495/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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ca148125e6
commit
de6d5b555c
2 changed files with 18 additions and 5 deletions
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@ -71,6 +71,7 @@ Ip_u2u1u3(_dsra);
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Ip_u2u1u3(_dsrl);
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Ip_u2u1u3(_dsrl32);
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Ip_u2u1u3(_drotr);
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Ip_u2u1u3(_drotr32);
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Ip_u3u1u2(_dsubu);
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Ip_0(_eret);
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Ip_u1(_j);
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@ -176,6 +177,15 @@ static inline void uasm_i_dsrl_safe(u32 **p, unsigned int a1,
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uasm_i_dsrl32(p, a1, a2, a3 - 32);
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}
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static inline void uasm_i_drotr_safe(u32 **p, unsigned int a1,
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unsigned int a2, unsigned int a3)
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{
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if (a3 < 32)
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uasm_i_drotr(p, a1, a2, a3);
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else
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uasm_i_drotr32(p, a1, a2, a3 - 32);
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}
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static inline void uasm_i_dsll_safe(u32 **p, unsigned int a1,
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unsigned int a2, unsigned int a3)
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{
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@ -62,11 +62,12 @@ enum opcode {
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insn_beql, insn_bgez, insn_bgezl, insn_bltz, insn_bltzl,
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insn_bne, insn_cache, insn_daddu, insn_daddiu, insn_dmfc0,
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insn_dmtc0, insn_dsll, insn_dsll32, insn_dsra, insn_dsrl,
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insn_dsrl32, insn_drotr, insn_dsubu, insn_eret, insn_j, insn_jal,
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insn_jr, insn_ld, insn_ll, insn_lld, insn_lui, insn_lw, insn_mfc0,
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insn_mtc0, insn_or, insn_ori, insn_pref, insn_rfe, insn_sc, insn_scd,
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insn_sd, insn_sll, insn_sra, insn_srl, insn_rotr, insn_subu, insn_sw,
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insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori,
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insn_dsrl32, insn_drotr, insn_drotr32, insn_dsubu, insn_eret,
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insn_j, insn_jal, insn_jr, insn_ld, insn_ll, insn_lld,
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insn_lui, insn_lw, insn_mfc0, insn_mtc0, insn_or, insn_ori,
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insn_pref, insn_rfe, insn_sc, insn_scd, insn_sd, insn_sll,
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insn_sra, insn_srl, insn_rotr, insn_subu, insn_sw, insn_tlbp,
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insn_tlbr, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori,
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insn_dins, insn_syscall
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};
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@ -108,6 +109,7 @@ static struct insn insn_table[] __cpuinitdata = {
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{ insn_dsrl, M(spec_op, 0, 0, 0, 0, dsrl_op), RT | RD | RE },
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{ insn_dsrl32, M(spec_op, 0, 0, 0, 0, dsrl32_op), RT | RD | RE },
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{ insn_drotr, M(spec_op, 1, 0, 0, 0, dsrl_op), RT | RD | RE },
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{ insn_drotr32, M(spec_op, 1, 0, 0, 0, dsrl32_op), RT | RD | RE },
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{ insn_dsubu, M(spec_op, 0, 0, 0, 0, dsubu_op), RS | RT | RD },
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{ insn_eret, M(cop0_op, cop_op, 0, 0, 0, eret_op), 0 },
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{ insn_j, M(j_op, 0, 0, 0, 0, 0), JIMM },
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@ -375,6 +377,7 @@ I_u2u1u3(_dsra)
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I_u2u1u3(_dsrl)
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I_u2u1u3(_dsrl32)
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I_u2u1u3(_drotr)
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I_u2u1u3(_drotr32)
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I_u3u1u2(_dsubu)
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I_0(_eret)
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I_u1(_j)
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