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arm64: dts: qcom: sc8280xp: Add "mhi" region to the PCIe nodes
The "mhi" region contains the debug registers that could be used to monitor the PCIe link transitions. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230316081117.14288-19-manivannan.sadhasivam@linaro.org
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8921034240
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1 changed files with 15 additions and 10 deletions
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@ -1660,8 +1660,9 @@ pcie4: pcie@1c00000 {
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<0x0 0x30000000 0x0 0xf1d>,
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<0x0 0x30000f20 0x0 0xa8>,
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<0x0 0x30001000 0x0 0x1000>,
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<0x0 0x30100000 0x0 0x100000>;
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reg-names = "parf", "dbi", "elbi", "atu", "config";
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<0x0 0x30100000 0x0 0x100000>,
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<0x0 0x01c03000 0x0 0x1000>;
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reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x01000000 0x0 0x00000000 0x0 0x30200000 0x0 0x100000>,
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@ -1759,8 +1760,9 @@ pcie3b: pcie@1c08000 {
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<0x0 0x32000000 0x0 0xf1d>,
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<0x0 0x32000f20 0x0 0xa8>,
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<0x0 0x32001000 0x0 0x1000>,
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<0x0 0x32100000 0x0 0x100000>;
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reg-names = "parf", "dbi", "elbi", "atu", "config";
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<0x0 0x32100000 0x0 0x100000>,
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<0x0 0x01c0b000 0x0 0x1000>;
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reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x01000000 0x0 0x00000000 0x0 0x32200000 0x0 0x100000>,
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@ -1856,8 +1858,9 @@ pcie3a: pcie@1c10000 {
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<0x0 0x34000000 0x0 0xf1d>,
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<0x0 0x34000f20 0x0 0xa8>,
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<0x0 0x34001000 0x0 0x1000>,
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<0x0 0x34100000 0x0 0x100000>;
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reg-names = "parf", "dbi", "elbi", "atu", "config";
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<0x0 0x34100000 0x0 0x100000>,
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<0x0 0x01c13000 0x0 0x1000>;
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reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x01000000 0x0 0x00000000 0x0 0x34200000 0x0 0x100000>,
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@ -1956,8 +1959,9 @@ pcie2b: pcie@1c18000 {
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<0x0 0x38000000 0x0 0xf1d>,
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<0x0 0x38000f20 0x0 0xa8>,
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<0x0 0x38001000 0x0 0x1000>,
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<0x0 0x38100000 0x0 0x100000>;
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reg-names = "parf", "dbi", "elbi", "atu", "config";
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<0x0 0x38100000 0x0 0x100000>,
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<0x0 0x01c1b000 0x0 0x1000>;
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reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x01000000 0x0 0x00000000 0x0 0x38200000 0x0 0x100000>,
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@ -2053,8 +2057,9 @@ pcie2a: pcie@1c20000 {
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<0x0 0x3c000000 0x0 0xf1d>,
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<0x0 0x3c000f20 0x0 0xa8>,
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<0x0 0x3c001000 0x0 0x1000>,
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<0x0 0x3c100000 0x0 0x100000>;
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reg-names = "parf", "dbi", "elbi", "atu", "config";
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<0x0 0x3c100000 0x0 0x100000>,
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<0x0 0x01c23000 0x0 0x1000>;
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reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x01000000 0x0 0x00000000 0x0 0x3c200000 0x0 0x100000>,
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