mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-13 22:25:03 +00:00
Samsung pinctrl drivers changes for v4.18
1. Driver expects specific order of GPIO interrupt banks. For S5Pv220
and Exynos5410 this order was not preserved so fix and document it.
2. Remove support for Exynos5440 (tree-wide, support is dropped because
there are no real users of this platform, it also did not get testing
since long time).
3. Fix lost state of GPF1..5 pins on Exynos5433 during system suspend.
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Merge tag 'samsung-pinctrl-4.18-2' of https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel
Samsung pinctrl drivers changes for v4.18
1. Driver expects specific order of GPIO interrupt banks. For S5Pv220
and Exynos5410 this order was not preserved so fix and document it.
2. Remove support for Exynos5440 (tree-wide, support is dropped because
there are no real users of this platform, it also did not get testing
since long time).
3. Fix lost state of GPF1..5 pins on Exynos5433 during system suspend.
This commit is contained in:
Linus Walleij
commit
de8a6c672f
6 changed files with 51 additions and 1017 deletions
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@ -8,26 +8,20 @@ config PINCTRL_SAMSUNG
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select PINCONF
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config PINCTRL_EXYNOS
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bool "Pinctrl driver data for Samsung EXYNOS SoCs other than 5440"
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bool "Pinctrl driver data for Samsung EXYNOS SoCs"
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depends on OF && GPIOLIB && (ARCH_EXYNOS || ARCH_S5PV210)
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select PINCTRL_SAMSUNG
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select PINCTRL_EXYNOS_ARM if ARM && (ARCH_EXYNOS || ARCH_S5PV210)
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select PINCTRL_EXYNOS_ARM64 if ARM64 && ARCH_EXYNOS
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config PINCTRL_EXYNOS_ARM
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bool "ARMv7-specific pinctrl driver data for Exynos (except Exynos5440)" if COMPILE_TEST
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bool "ARMv7-specific pinctrl driver data for Exynos" if COMPILE_TEST
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depends on PINCTRL_EXYNOS
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config PINCTRL_EXYNOS_ARM64
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bool "ARMv8-specific pinctrl driver data for Exynos" if COMPILE_TEST
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depends on PINCTRL_EXYNOS
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config PINCTRL_EXYNOS5440
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bool "Samsung EXYNOS5440 SoC pinctrl driver"
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depends on SOC_EXYNOS5440
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select PINMUX
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select PINCONF
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config PINCTRL_S3C24XX
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bool "Samsung S3C24XX SoC pinctrl driver"
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depends on ARCH_S3C24XX && OF
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@ -5,6 +5,5 @@ obj-$(CONFIG_PINCTRL_SAMSUNG) += pinctrl-samsung.o
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obj-$(CONFIG_PINCTRL_EXYNOS) += pinctrl-exynos.o
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obj-$(CONFIG_PINCTRL_EXYNOS_ARM) += pinctrl-exynos-arm.o
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obj-$(CONFIG_PINCTRL_EXYNOS_ARM64) += pinctrl-exynos-arm64.o
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obj-$(CONFIG_PINCTRL_EXYNOS5440) += pinctrl-exynos5440.o
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obj-$(CONFIG_PINCTRL_S3C24XX) += pinctrl-s3c24xx.o
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obj-$(CONFIG_PINCTRL_S3C64XX) += pinctrl-s3c64xx.o
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@ -88,6 +88,7 @@ static const struct samsung_retention_data s5pv210_retention_data __initconst =
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/* pin banks of s5pv210 pin-controller */
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static const struct samsung_pin_bank_data s5pv210_pin_bank[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
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EXYNOS_PIN_BANK_EINTG(4, 0x020, "gpa1", 0x04),
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EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpb", 0x08),
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@ -105,12 +106,12 @@ static const struct samsung_pin_bank_data s5pv210_pin_bank[] __initconst = {
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EXYNOS_PIN_BANK_EINTG(7, 0x1c0, "gpg1", 0x38),
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EXYNOS_PIN_BANK_EINTG(7, 0x1e0, "gpg2", 0x3c),
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EXYNOS_PIN_BANK_EINTG(7, 0x200, "gpg3", 0x40),
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EXYNOS_PIN_BANK_EINTN(7, 0x220, "gpi"),
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EXYNOS_PIN_BANK_EINTG(8, 0x240, "gpj0", 0x44),
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EXYNOS_PIN_BANK_EINTG(6, 0x260, "gpj1", 0x48),
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EXYNOS_PIN_BANK_EINTG(8, 0x280, "gpj2", 0x4c),
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EXYNOS_PIN_BANK_EINTG(8, 0x2a0, "gpj3", 0x50),
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EXYNOS_PIN_BANK_EINTG(5, 0x2c0, "gpj4", 0x54),
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EXYNOS_PIN_BANK_EINTN(7, 0x220, "gpi"),
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EXYNOS_PIN_BANK_EINTN(8, 0x2e0, "mp01"),
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EXYNOS_PIN_BANK_EINTN(4, 0x300, "mp02"),
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EXYNOS_PIN_BANK_EINTN(8, 0x320, "mp03"),
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@ -147,6 +148,7 @@ static atomic_t exynos_shared_retention_refcnt;
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/* pin banks of exynos3250 pin-controller 0 */
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static const struct samsung_pin_bank_data exynos3250_pin_banks0[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
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EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpa1", 0x04),
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EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpb", 0x08),
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@ -158,6 +160,7 @@ static const struct samsung_pin_bank_data exynos3250_pin_banks0[] __initconst =
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/* pin banks of exynos3250 pin-controller 1 */
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static const struct samsung_pin_bank_data exynos3250_pin_banks1[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS_PIN_BANK_EINTN(8, 0x120, "gpe0"),
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EXYNOS_PIN_BANK_EINTN(8, 0x140, "gpe1"),
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EXYNOS_PIN_BANK_EINTN(3, 0x180, "gpe2"),
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@ -232,6 +235,7 @@ const struct samsung_pinctrl_of_match_data exynos3250_of_data __initconst = {
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/* pin banks of exynos4210 pin-controller 0 */
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static const struct samsung_pin_bank_data exynos4210_pin_banks0[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
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EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpa1", 0x04),
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EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpb", 0x08),
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@ -252,6 +256,7 @@ static const struct samsung_pin_bank_data exynos4210_pin_banks0[] __initconst =
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/* pin banks of exynos4210 pin-controller 1 */
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static const struct samsung_pin_bank_data exynos4210_pin_banks1[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpj0", 0x00),
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EXYNOS_PIN_BANK_EINTG(5, 0x020, "gpj1", 0x04),
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EXYNOS_PIN_BANK_EINTG(7, 0x040, "gpk0", 0x08),
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@ -276,6 +281,7 @@ static const struct samsung_pin_bank_data exynos4210_pin_banks1[] __initconst =
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/* pin banks of exynos4210 pin-controller 2 */
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static const struct samsung_pin_bank_data exynos4210_pin_banks2[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS_PIN_BANK_EINTN(7, 0x000, "gpz"),
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};
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@ -346,6 +352,7 @@ const struct samsung_pinctrl_of_match_data exynos4210_of_data __initconst = {
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/* pin banks of exynos4x12 pin-controller 0 */
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static const struct samsung_pin_bank_data exynos4x12_pin_banks0[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
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EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpa1", 0x04),
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EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpb", 0x08),
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@ -363,6 +370,7 @@ static const struct samsung_pin_bank_data exynos4x12_pin_banks0[] __initconst =
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/* pin banks of exynos4x12 pin-controller 1 */
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static const struct samsung_pin_bank_data exynos4x12_pin_banks1[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS_PIN_BANK_EINTG(7, 0x040, "gpk0", 0x08),
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EXYNOS_PIN_BANK_EINTG(7, 0x060, "gpk1", 0x0c),
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EXYNOS_PIN_BANK_EINTG(7, 0x080, "gpk2", 0x10),
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@ -390,11 +398,13 @@ static const struct samsung_pin_bank_data exynos4x12_pin_banks1[] __initconst =
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/* pin banks of exynos4x12 pin-controller 2 */
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static const struct samsung_pin_bank_data exynos4x12_pin_banks2[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpz", 0x00),
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};
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/* pin banks of exynos4x12 pin-controller 3 */
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static const struct samsung_pin_bank_data exynos4x12_pin_banks3[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpv0", 0x00),
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EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpv1", 0x04),
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EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpv2", 0x08),
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@ -449,6 +459,7 @@ const struct samsung_pinctrl_of_match_data exynos4x12_of_data __initconst = {
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/* pin banks of exynos5250 pin-controller 0 */
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static const struct samsung_pin_bank_data exynos5250_pin_banks0[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
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EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpa1", 0x04),
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EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpa2", 0x08),
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@ -478,6 +489,7 @@ static const struct samsung_pin_bank_data exynos5250_pin_banks0[] __initconst =
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/* pin banks of exynos5250 pin-controller 1 */
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static const struct samsung_pin_bank_data exynos5250_pin_banks1[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpe0", 0x00),
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EXYNOS_PIN_BANK_EINTG(2, 0x020, "gpe1", 0x04),
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EXYNOS_PIN_BANK_EINTG(4, 0x040, "gpf0", 0x08),
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@ -491,6 +503,7 @@ static const struct samsung_pin_bank_data exynos5250_pin_banks1[] __initconst =
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/* pin banks of exynos5250 pin-controller 2 */
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static const struct samsung_pin_bank_data exynos5250_pin_banks2[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpv0", 0x00),
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EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpv1", 0x04),
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EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpv2", 0x08),
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@ -500,6 +513,7 @@ static const struct samsung_pin_bank_data exynos5250_pin_banks2[] __initconst =
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/* pin banks of exynos5250 pin-controller 3 */
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static const struct samsung_pin_bank_data exynos5250_pin_banks3[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpz", 0x00),
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};
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@ -550,6 +564,7 @@ const struct samsung_pinctrl_of_match_data exynos5250_of_data __initconst = {
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/* pin banks of exynos5260 pin-controller 0 */
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static const struct samsung_pin_bank_data exynos5260_pin_banks0[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS_PIN_BANK_EINTG(4, 0x000, "gpa0", 0x00),
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EXYNOS_PIN_BANK_EINTG(7, 0x020, "gpa1", 0x04),
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EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpa2", 0x08),
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@ -575,6 +590,7 @@ static const struct samsung_pin_bank_data exynos5260_pin_banks0[] __initconst =
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/* pin banks of exynos5260 pin-controller 1 */
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static const struct samsung_pin_bank_data exynos5260_pin_banks1[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpc0", 0x00),
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EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpc1", 0x04),
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EXYNOS_PIN_BANK_EINTG(7, 0x040, "gpc2", 0x08),
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@ -584,6 +600,7 @@ static const struct samsung_pin_bank_data exynos5260_pin_banks1[] __initconst =
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/* pin banks of exynos5260 pin-controller 2 */
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static const struct samsung_pin_bank_data exynos5260_pin_banks2[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpz0", 0x00),
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EXYNOS_PIN_BANK_EINTG(4, 0x020, "gpz1", 0x04),
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};
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@ -619,6 +636,7 @@ const struct samsung_pinctrl_of_match_data exynos5260_of_data __initconst = {
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/* pin banks of exynos5410 pin-controller 0 */
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static const struct samsung_pin_bank_data exynos5410_pin_banks0[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
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EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpa1", 0x04),
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EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpa2", 0x08),
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@ -630,7 +648,6 @@ static const struct samsung_pin_bank_data exynos5410_pin_banks0[] __initconst =
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EXYNOS_PIN_BANK_EINTG(4, 0x100, "gpc3", 0x20),
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EXYNOS_PIN_BANK_EINTG(7, 0x120, "gpc1", 0x24),
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EXYNOS_PIN_BANK_EINTG(7, 0x140, "gpc2", 0x28),
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EXYNOS_PIN_BANK_EINTN(2, 0x160, "gpm5"),
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EXYNOS_PIN_BANK_EINTG(8, 0x180, "gpd1", 0x2c),
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EXYNOS_PIN_BANK_EINTG(8, 0x1A0, "gpe0", 0x30),
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EXYNOS_PIN_BANK_EINTG(2, 0x1C0, "gpe1", 0x34),
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@ -641,6 +658,7 @@ static const struct samsung_pin_bank_data exynos5410_pin_banks0[] __initconst =
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EXYNOS_PIN_BANK_EINTG(2, 0x260, "gpg2", 0x48),
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EXYNOS_PIN_BANK_EINTG(4, 0x280, "gph0", 0x4c),
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EXYNOS_PIN_BANK_EINTG(8, 0x2A0, "gph1", 0x50),
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EXYNOS_PIN_BANK_EINTN(2, 0x160, "gpm5"),
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EXYNOS_PIN_BANK_EINTN(8, 0x2C0, "gpm7"),
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EXYNOS_PIN_BANK_EINTN(6, 0x2E0, "gpy0"),
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EXYNOS_PIN_BANK_EINTN(4, 0x300, "gpy1"),
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@ -658,6 +676,7 @@ static const struct samsung_pin_bank_data exynos5410_pin_banks0[] __initconst =
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/* pin banks of exynos5410 pin-controller 1 */
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static const struct samsung_pin_bank_data exynos5410_pin_banks1[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS_PIN_BANK_EINTG(5, 0x000, "gpj0", 0x00),
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EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpj1", 0x04),
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EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpj2", 0x08),
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@ -671,6 +690,7 @@ static const struct samsung_pin_bank_data exynos5410_pin_banks1[] __initconst =
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/* pin banks of exynos5410 pin-controller 2 */
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static const struct samsung_pin_bank_data exynos5410_pin_banks2[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpv0", 0x00),
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EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpv1", 0x04),
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EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpv2", 0x08),
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@ -680,6 +700,7 @@ static const struct samsung_pin_bank_data exynos5410_pin_banks2[] __initconst =
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/* pin banks of exynos5410 pin-controller 3 */
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static const struct samsung_pin_bank_data exynos5410_pin_banks3[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpz", 0x00),
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};
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@ -727,6 +748,7 @@ const struct samsung_pinctrl_of_match_data exynos5410_of_data __initconst = {
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/* pin banks of exynos5420 pin-controller 0 */
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static const struct samsung_pin_bank_data exynos5420_pin_banks0[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
|
||||
EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpy7", 0x00),
|
||||
EXYNOS_PIN_BANK_EINTW(8, 0xC00, "gpx0", 0x00),
|
||||
EXYNOS_PIN_BANK_EINTW(8, 0xC20, "gpx1", 0x04),
|
||||
|
|
@ -736,6 +758,7 @@ static const struct samsung_pin_bank_data exynos5420_pin_banks0[] __initconst =
|
|||
|
||||
/* pin banks of exynos5420 pin-controller 1 */
|
||||
static const struct samsung_pin_bank_data exynos5420_pin_banks1[] __initconst = {
|
||||
/* Must start with EINTG banks, ordered by EINT group number. */
|
||||
EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpc0", 0x00),
|
||||
EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpc1", 0x04),
|
||||
EXYNOS_PIN_BANK_EINTG(7, 0x040, "gpc2", 0x08),
|
||||
|
|
@ -753,6 +776,7 @@ static const struct samsung_pin_bank_data exynos5420_pin_banks1[] __initconst =
|
|||
|
||||
/* pin banks of exynos5420 pin-controller 2 */
|
||||
static const struct samsung_pin_bank_data exynos5420_pin_banks2[] __initconst = {
|
||||
/* Must start with EINTG banks, ordered by EINT group number. */
|
||||
EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpe0", 0x00),
|
||||
EXYNOS_PIN_BANK_EINTG(2, 0x020, "gpe1", 0x04),
|
||||
EXYNOS_PIN_BANK_EINTG(6, 0x040, "gpf0", 0x08),
|
||||
|
|
@ -765,6 +789,7 @@ static const struct samsung_pin_bank_data exynos5420_pin_banks2[] __initconst =
|
|||
|
||||
/* pin banks of exynos5420 pin-controller 3 */
|
||||
static const struct samsung_pin_bank_data exynos5420_pin_banks3[] __initconst = {
|
||||
/* Must start with EINTG banks, ordered by EINT group number. */
|
||||
EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
|
||||
EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpa1", 0x04),
|
||||
EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpa2", 0x08),
|
||||
|
|
@ -778,6 +803,7 @@ static const struct samsung_pin_bank_data exynos5420_pin_banks3[] __initconst =
|
|||
|
||||
/* pin banks of exynos5420 pin-controller 4 */
|
||||
static const struct samsung_pin_bank_data exynos5420_pin_banks4[] __initconst = {
|
||||
/* Must start with EINTG banks, ordered by EINT group number. */
|
||||
EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpz", 0x00),
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -45,6 +45,7 @@ static atomic_t exynos_shared_retention_refcnt;
|
|||
|
||||
/* pin banks of exynos5433 pin-controller - ALIVE */
|
||||
static const struct samsung_pin_bank_data exynos5433_pin_banks0[] __initconst = {
|
||||
/* Must start with EINTG banks, ordered by EINT group number. */
|
||||
EXYNOS5433_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00),
|
||||
EXYNOS5433_PIN_BANK_EINTW(8, 0x020, "gpa1", 0x04),
|
||||
EXYNOS5433_PIN_BANK_EINTW(8, 0x040, "gpa2", 0x08),
|
||||
|
|
@ -58,27 +59,32 @@ static const struct samsung_pin_bank_data exynos5433_pin_banks0[] __initconst =
|
|||
|
||||
/* pin banks of exynos5433 pin-controller - AUD */
|
||||
static const struct samsung_pin_bank_data exynos5433_pin_banks1[] __initconst = {
|
||||
/* Must start with EINTG banks, ordered by EINT group number. */
|
||||
EXYNOS5433_PIN_BANK_EINTG(7, 0x000, "gpz0", 0x00),
|
||||
EXYNOS5433_PIN_BANK_EINTG(4, 0x020, "gpz1", 0x04),
|
||||
};
|
||||
|
||||
/* pin banks of exynos5433 pin-controller - CPIF */
|
||||
static const struct samsung_pin_bank_data exynos5433_pin_banks2[] __initconst = {
|
||||
/* Must start with EINTG banks, ordered by EINT group number. */
|
||||
EXYNOS5433_PIN_BANK_EINTG(2, 0x000, "gpv6", 0x00),
|
||||
};
|
||||
|
||||
/* pin banks of exynos5433 pin-controller - eSE */
|
||||
static const struct samsung_pin_bank_data exynos5433_pin_banks3[] __initconst = {
|
||||
/* Must start with EINTG banks, ordered by EINT group number. */
|
||||
EXYNOS5433_PIN_BANK_EINTG(3, 0x000, "gpj2", 0x00),
|
||||
};
|
||||
|
||||
/* pin banks of exynos5433 pin-controller - FINGER */
|
||||
static const struct samsung_pin_bank_data exynos5433_pin_banks4[] __initconst = {
|
||||
/* Must start with EINTG banks, ordered by EINT group number. */
|
||||
EXYNOS5433_PIN_BANK_EINTG(4, 0x000, "gpd5", 0x00),
|
||||
};
|
||||
|
||||
/* pin banks of exynos5433 pin-controller - FSYS */
|
||||
static const struct samsung_pin_bank_data exynos5433_pin_banks5[] __initconst = {
|
||||
/* Must start with EINTG banks, ordered by EINT group number. */
|
||||
EXYNOS5433_PIN_BANK_EINTG(6, 0x000, "gph1", 0x00),
|
||||
EXYNOS5433_PIN_BANK_EINTG(7, 0x020, "gpr4", 0x04),
|
||||
EXYNOS5433_PIN_BANK_EINTG(5, 0x040, "gpr0", 0x08),
|
||||
|
|
@ -89,16 +95,19 @@ static const struct samsung_pin_bank_data exynos5433_pin_banks5[] __initconst =
|
|||
|
||||
/* pin banks of exynos5433 pin-controller - IMEM */
|
||||
static const struct samsung_pin_bank_data exynos5433_pin_banks6[] __initconst = {
|
||||
/* Must start with EINTG banks, ordered by EINT group number. */
|
||||
EXYNOS5433_PIN_BANK_EINTG(8, 0x000, "gpf0", 0x00),
|
||||
};
|
||||
|
||||
/* pin banks of exynos5433 pin-controller - NFC */
|
||||
static const struct samsung_pin_bank_data exynos5433_pin_banks7[] __initconst = {
|
||||
/* Must start with EINTG banks, ordered by EINT group number. */
|
||||
EXYNOS5433_PIN_BANK_EINTG(3, 0x000, "gpj0", 0x00),
|
||||
};
|
||||
|
||||
/* pin banks of exynos5433 pin-controller - PERIC */
|
||||
static const struct samsung_pin_bank_data exynos5433_pin_banks8[] __initconst = {
|
||||
/* Must start with EINTG banks, ordered by EINT group number. */
|
||||
EXYNOS5433_PIN_BANK_EINTG(6, 0x000, "gpv7", 0x00),
|
||||
EXYNOS5433_PIN_BANK_EINTG(5, 0x020, "gpb0", 0x04),
|
||||
EXYNOS5433_PIN_BANK_EINTG(8, 0x040, "gpc0", 0x08),
|
||||
|
|
@ -120,6 +129,7 @@ static const struct samsung_pin_bank_data exynos5433_pin_banks8[] __initconst =
|
|||
|
||||
/* pin banks of exynos5433 pin-controller - TOUCH */
|
||||
static const struct samsung_pin_bank_data exynos5433_pin_banks9[] __initconst = {
|
||||
/* Must start with EINTG banks, ordered by EINT group number. */
|
||||
EXYNOS5433_PIN_BANK_EINTG(3, 0x000, "gpj1", 0x00),
|
||||
};
|
||||
|
||||
|
|
@ -267,6 +277,7 @@ const struct samsung_pinctrl_of_match_data exynos5433_of_data __initconst = {
|
|||
|
||||
/* pin banks of exynos7 pin-controller - ALIVE */
|
||||
static const struct samsung_pin_bank_data exynos7_pin_banks0[] __initconst = {
|
||||
/* Must start with EINTG banks, ordered by EINT group number. */
|
||||
EXYNOS_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00),
|
||||
EXYNOS_PIN_BANK_EINTW(8, 0x020, "gpa1", 0x04),
|
||||
EXYNOS_PIN_BANK_EINTW(8, 0x040, "gpa2", 0x08),
|
||||
|
|
@ -275,6 +286,7 @@ static const struct samsung_pin_bank_data exynos7_pin_banks0[] __initconst = {
|
|||
|
||||
/* pin banks of exynos7 pin-controller - BUS0 */
|
||||
static const struct samsung_pin_bank_data exynos7_pin_banks1[] __initconst = {
|
||||
/* Must start with EINTG banks, ordered by EINT group number. */
|
||||
EXYNOS_PIN_BANK_EINTG(5, 0x000, "gpb0", 0x00),
|
||||
EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpc0", 0x04),
|
||||
EXYNOS_PIN_BANK_EINTG(2, 0x040, "gpc1", 0x08),
|
||||
|
|
@ -294,31 +306,37 @@ static const struct samsung_pin_bank_data exynos7_pin_banks1[] __initconst = {
|
|||
|
||||
/* pin banks of exynos7 pin-controller - NFC */
|
||||
static const struct samsung_pin_bank_data exynos7_pin_banks2[] __initconst = {
|
||||
/* Must start with EINTG banks, ordered by EINT group number. */
|
||||
EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj0", 0x00),
|
||||
};
|
||||
|
||||
/* pin banks of exynos7 pin-controller - TOUCH */
|
||||
static const struct samsung_pin_bank_data exynos7_pin_banks3[] __initconst = {
|
||||
/* Must start with EINTG banks, ordered by EINT group number. */
|
||||
EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj1", 0x00),
|
||||
};
|
||||
|
||||
/* pin banks of exynos7 pin-controller - FF */
|
||||
static const struct samsung_pin_bank_data exynos7_pin_banks4[] __initconst = {
|
||||
/* Must start with EINTG banks, ordered by EINT group number. */
|
||||
EXYNOS_PIN_BANK_EINTG(4, 0x000, "gpg4", 0x00),
|
||||
};
|
||||
|
||||
/* pin banks of exynos7 pin-controller - ESE */
|
||||
static const struct samsung_pin_bank_data exynos7_pin_banks5[] __initconst = {
|
||||
/* Must start with EINTG banks, ordered by EINT group number. */
|
||||
EXYNOS_PIN_BANK_EINTG(5, 0x000, "gpv7", 0x00),
|
||||
};
|
||||
|
||||
/* pin banks of exynos7 pin-controller - FSYS0 */
|
||||
static const struct samsung_pin_bank_data exynos7_pin_banks6[] __initconst = {
|
||||
/* Must start with EINTG banks, ordered by EINT group number. */
|
||||
EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpr4", 0x00),
|
||||
};
|
||||
|
||||
/* pin banks of exynos7 pin-controller - FSYS1 */
|
||||
static const struct samsung_pin_bank_data exynos7_pin_banks7[] __initconst = {
|
||||
/* Must start with EINTG banks, ordered by EINT group number. */
|
||||
EXYNOS_PIN_BANK_EINTG(4, 0x000, "gpr0", 0x00),
|
||||
EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpr1", 0x04),
|
||||
EXYNOS_PIN_BANK_EINTG(5, 0x040, "gpr2", 0x08),
|
||||
|
|
@ -327,6 +345,7 @@ static const struct samsung_pin_bank_data exynos7_pin_banks7[] __initconst = {
|
|||
|
||||
/* pin banks of exynos7 pin-controller - BUS1 */
|
||||
static const struct samsung_pin_bank_data exynos7_pin_banks8[] __initconst = {
|
||||
/* Must start with EINTG banks, ordered by EINT group number. */
|
||||
EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpf0", 0x00),
|
||||
EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpf1", 0x04),
|
||||
EXYNOS_PIN_BANK_EINTG(4, 0x060, "gpf2", 0x08),
|
||||
|
|
@ -340,6 +359,7 @@ static const struct samsung_pin_bank_data exynos7_pin_banks8[] __initconst = {
|
|||
};
|
||||
|
||||
static const struct samsung_pin_bank_data exynos7_pin_banks9[] __initconst = {
|
||||
/* Must start with EINTG banks, ordered by EINT group number. */
|
||||
EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpz0", 0x00),
|
||||
EXYNOS_PIN_BANK_EINTG(4, 0x020, "gpz1", 0x04),
|
||||
};
|
||||
|
|
|
|||
|
|
@ -99,7 +99,7 @@
|
|||
|
||||
#define EXYNOS5433_PIN_BANK_EINTW_EXT(pins, reg, id, offs, pctl_idx) \
|
||||
{ \
|
||||
.type = &exynos5433_bank_type_alive, \
|
||||
.type = &exynos5433_bank_type_off, \
|
||||
.pctl_offset = reg, \
|
||||
.nr_pins = pins, \
|
||||
.eint_type = EINT_TYPE_WKUP, \
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
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Reference in a new issue