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ASoC: Intel: bytcr_rt5640: add MCLK support
Use platform clocks "pmc_plt_clk_3" when MCLK quirk is defined. By default always enable the 19.2 MHz PLL. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Irina Tirdea <irina.tirdea@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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59e8b6520c
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df1a2776a7
1 changed files with 171 additions and 14 deletions
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@ -26,6 +26,7 @@
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#include <linux/slab.h>
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#include <asm/cpu_device_id.h>
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#include <asm/platform_sst_audio.h>
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#include <linux/clk.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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@ -49,18 +50,104 @@ enum {
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#define BYT_RT5640_SSP2_AIF2 BIT(19) /* default is using AIF1 */
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#define BYT_RT5640_SSP0_AIF1 BIT(20)
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#define BYT_RT5640_SSP0_AIF2 BIT(21)
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#define BYT_RT5640_MCLK_EN BIT(22)
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#define BYT_RT5640_MCLK_25MHZ BIT(23)
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struct byt_rt5640_private {
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struct clk *mclk;
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};
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static unsigned long byt_rt5640_quirk = BYT_RT5640_DMIC1_MAP |
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BYT_RT5640_DMIC_EN;
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BYT_RT5640_DMIC_EN |
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BYT_RT5640_MCLK_EN;
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#define BYT_CODEC_DAI1 "rt5640-aif1"
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#define BYT_CODEC_DAI2 "rt5640-aif2"
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static inline struct snd_soc_dai *byt_get_codec_dai(struct snd_soc_card *card)
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{
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struct snd_soc_pcm_runtime *rtd;
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list_for_each_entry(rtd, &card->rtd_list, list) {
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if (!strncmp(rtd->codec_dai->name, BYT_CODEC_DAI1,
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strlen(BYT_CODEC_DAI1)))
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return rtd->codec_dai;
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if (!strncmp(rtd->codec_dai->name, BYT_CODEC_DAI2,
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strlen(BYT_CODEC_DAI2)))
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return rtd->codec_dai;
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}
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return NULL;
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}
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static int platform_clock_control(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *k, int event)
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{
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struct snd_soc_dapm_context *dapm = w->dapm;
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struct snd_soc_card *card = dapm->card;
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struct snd_soc_dai *codec_dai;
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struct byt_rt5640_private *priv = snd_soc_card_get_drvdata(card);
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int ret;
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codec_dai = byt_get_codec_dai(card);
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if (!codec_dai) {
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dev_err(card->dev,
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"Codec dai not found; Unable to set platform clock\n");
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return -EIO;
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}
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if (SND_SOC_DAPM_EVENT_ON(event)) {
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if ((byt_rt5640_quirk & BYT_RT5640_MCLK_EN) && priv->mclk) {
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ret = clk_prepare_enable(priv->mclk);
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if (ret < 0) {
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dev_err(card->dev,
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"could not configure MCLK state");
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return ret;
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}
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}
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ret = snd_soc_dai_set_sysclk(codec_dai, RT5640_SCLK_S_PLL1,
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48000 * 512,
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SND_SOC_CLOCK_IN);
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} else {
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/*
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* Set codec clock source to internal clock before
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* turning off the platform clock. Codec needs clock
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* for Jack detection and button press
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*/
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ret = snd_soc_dai_set_sysclk(codec_dai, RT5640_SCLK_S_RCCLK,
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0,
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SND_SOC_CLOCK_IN);
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if (!ret) {
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if ((byt_rt5640_quirk & BYT_RT5640_MCLK_EN) && priv->mclk)
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clk_disable_unprepare(priv->mclk);
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}
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}
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if (ret < 0) {
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dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
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return ret;
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}
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return 0;
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}
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static const struct snd_soc_dapm_widget byt_rt5640_widgets[] = {
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SND_SOC_DAPM_HP("Headphone", NULL),
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SND_SOC_DAPM_MIC("Headset Mic", NULL),
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SND_SOC_DAPM_MIC("Internal Mic", NULL),
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SND_SOC_DAPM_SPK("Speaker", NULL),
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SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
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platform_clock_control, SND_SOC_DAPM_PRE_PMU |
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SND_SOC_DAPM_POST_PMD),
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};
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static const struct snd_soc_dapm_route byt_rt5640_audio_map[] = {
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{"Headphone", NULL, "Platform Clock"},
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{"Headset Mic", NULL, "Platform Clock"},
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{"Internal Mic", NULL, "Platform Clock"},
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{"Speaker", NULL, "Platform Clock"},
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{"Headset Mic", NULL, "MICBIAS1"},
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{"IN2P", NULL, "Headset Mic"},
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{"Headphone", NULL, "HPOL"},
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@ -150,21 +237,41 @@ static int byt_rt5640_aif1_hw_params(struct snd_pcm_substream *substream,
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ret = snd_soc_dai_set_sysclk(codec_dai, RT5640_SCLK_S_PLL1,
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params_rate(params) * 512,
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SND_SOC_CLOCK_IN);
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if (ret < 0) {
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dev_err(rtd->dev, "can't set codec clock %d\n", ret);
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return ret;
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}
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if ((byt_rt5640_quirk & BYT_RT5640_SSP0_AIF1) ||
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(byt_rt5640_quirk & BYT_RT5640_SSP0_AIF2)) {
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if (!(byt_rt5640_quirk & BYT_RT5640_MCLK_EN)) {
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/* use bitclock as PLL input */
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if ((byt_rt5640_quirk & BYT_RT5640_SSP0_AIF1) ||
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(byt_rt5640_quirk & BYT_RT5640_SSP0_AIF2)) {
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ret = snd_soc_dai_set_pll(codec_dai, 0, RT5640_PLL1_S_BCLK1,
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params_rate(params) * 32, /* FIXME */
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params_rate(params) * 512);
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/* 2x16 bit slots on SSP0 */
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ret = snd_soc_dai_set_pll(codec_dai, 0,
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RT5640_PLL1_S_BCLK1,
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params_rate(params) * 32,
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params_rate(params) * 512);
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} else {
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/* 2x15 bit slots on SSP2 */
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ret = snd_soc_dai_set_pll(codec_dai, 0,
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RT5640_PLL1_S_BCLK1,
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params_rate(params) * 50,
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params_rate(params) * 512);
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}
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} else {
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ret = snd_soc_dai_set_pll(codec_dai, 0, RT5640_PLL1_S_BCLK1,
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params_rate(params) * 50,
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params_rate(params) * 512);
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if (byt_rt5640_quirk & BYT_RT5640_MCLK_25MHZ) {
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ret = snd_soc_dai_set_pll(codec_dai, 0,
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RT5640_PLL1_S_MCLK,
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25000000,
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params_rate(params) * 512);
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} else {
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ret = snd_soc_dai_set_pll(codec_dai, 0,
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RT5640_PLL1_S_MCLK,
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19200000,
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params_rate(params) * 512);
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}
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}
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if (ret < 0) {
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@ -188,7 +295,8 @@ static const struct dmi_system_id byt_rt5640_quirk_table[] = {
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DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
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DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "T100TA"),
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},
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.driver_data = (unsigned long *)BYT_RT5640_IN1_MAP,
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.driver_data = (unsigned long *)(BYT_RT5640_IN1_MAP |
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BYT_RT5640_MCLK_EN),
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},
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{
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.callback = byt_rt5640_quirk_cb,
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@ -199,7 +307,8 @@ static const struct dmi_system_id byt_rt5640_quirk_table[] = {
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.driver_data = (unsigned long *)(BYT_RT5640_IN1_MAP |
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BYT_RT5640_MONO_SPEAKER |
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BYT_RT5640_DIFF_MIC |
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BYT_RT5640_SSP0_AIF2
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BYT_RT5640_SSP0_AIF2 |
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BYT_RT5640_MCLK_EN
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),
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},
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{
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@ -209,7 +318,8 @@ static const struct dmi_system_id byt_rt5640_quirk_table[] = {
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DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Venue 8 Pro 5830"),
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},
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.driver_data = (unsigned long *)(BYT_RT5640_DMIC2_MAP |
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BYT_RT5640_DMIC_EN),
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BYT_RT5640_DMIC_EN |
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BYT_RT5640_MCLK_EN),
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},
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{
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.callback = byt_rt5640_quirk_cb,
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@ -217,7 +327,8 @@ static const struct dmi_system_id byt_rt5640_quirk_table[] = {
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DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
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DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "HP ElitePad 1000 G2"),
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},
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.driver_data = (unsigned long *)BYT_RT5640_IN1_MAP,
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.driver_data = (unsigned long *)(BYT_RT5640_IN1_MAP |
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BYT_RT5640_MCLK_EN),
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},
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{}
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};
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@ -228,13 +339,18 @@ static int byt_rt5640_init(struct snd_soc_pcm_runtime *runtime)
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struct snd_soc_codec *codec = runtime->codec;
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struct snd_soc_card *card = runtime->card;
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const struct snd_soc_dapm_route *custom_map;
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struct byt_rt5640_private *priv = snd_soc_card_get_drvdata(card);
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int num_routes;
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card->dapm.idle_bias_off = true;
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rt5640_sel_asrc_clk_src(codec,
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RT5640_DA_STEREO_FILTER |
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RT5640_AD_STEREO_FILTER,
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RT5640_DA_MONO_L_FILTER |
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RT5640_DA_MONO_R_FILTER |
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RT5640_AD_STEREO_FILTER |
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RT5640_AD_MONO_L_FILTER |
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RT5640_AD_MONO_R_FILTER,
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RT5640_CLK_SEL_ASRC);
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ret = snd_soc_add_card_controls(card, byt_rt5640_controls,
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snd_soc_dapm_ignore_suspend(&card->dapm, "Headphone");
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snd_soc_dapm_ignore_suspend(&card->dapm, "Speaker");
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if ((byt_rt5640_quirk & BYT_RT5640_MCLK_EN) && priv->mclk) {
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/*
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* The firmware might enable the clock at
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* boot (this information may or may not
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* be reflected in the enable clock register).
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* To change the rate we must disable the clock
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* first to cover these cases. Due to common
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* clock framework restrictions that do not allow
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* to disable a clock that has not been enabled,
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* we need to enable the clock first.
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*/
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ret = clk_prepare_enable(priv->mclk);
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if (!ret)
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clk_disable_unprepare(priv->mclk);
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if (byt_rt5640_quirk & BYT_RT5640_MCLK_25MHZ)
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ret = clk_set_rate(priv->mclk, 25000000);
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else
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ret = clk_set_rate(priv->mclk, 19200000);
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if (ret)
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dev_err(card->dev, "unable to set MCLK rate\n");
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}
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return ret;
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}
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@ -490,6 +630,7 @@ static bool is_valleyview(void)
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return true;
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}
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static int snd_byt_rt5640_mc_probe(struct platform_device *pdev)
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{
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int ret_val = 0;
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const char *i2c_name = NULL;
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int i;
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int dai_index;
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struct byt_rt5640_private *priv;
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_ATOMIC);
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if (!priv)
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return -ENOMEM;
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/* register the soc card */
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byt_rt5640_card.dev = &pdev->dev;
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mach = byt_rt5640_card.dev->platform_data;
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snd_soc_card_set_drvdata(&byt_rt5640_card, priv);
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/* fix index of codec dai */
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dai_index = MERR_DPCM_COMPR + 1;
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byt_rt5640_cpu_dai_name;
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}
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if ((byt_rt5640_quirk & BYT_RT5640_MCLK_EN) && (is_valleyview())) {
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priv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
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if (IS_ERR(priv->mclk)) {
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dev_err(&pdev->dev,
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"Failed to get MCLK from pmc_plt_clk_3: %ld\n",
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PTR_ERR(priv->mclk));
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return PTR_ERR(priv->mclk);
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}
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}
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ret_val = devm_snd_soc_register_card(&pdev->dev, &byt_rt5640_card);
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if (ret_val) {
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