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intel_pmc_core: Convert to DEFINE_DEBUGFS_ATTRIBUTE
Refactor the code to use the recently introduced DEFINE_DEBUGFS_ATTRIBUTE() macro to eliminate boilerplate code. Make the absence of DEBUG_FS a non-fatal error. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-and-tested-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@intel.com> Signed-off-by: Darren Hart <dvhart@linux.intel.com>
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696789343b
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df2294fb64
2 changed files with 11 additions and 37 deletions
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@ -23,7 +23,6 @@
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/pci.h>
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#include <linux/seq_file.h>
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#include <asm/cpu_device_id.h>
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#include <asm/pmc_core.h>
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@ -77,30 +76,18 @@ int intel_pmc_slp_s0_counter_read(u32 *data)
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}
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EXPORT_SYMBOL_GPL(intel_pmc_slp_s0_counter_read);
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#if IS_ENABLED(CONFIG_DEBUG_FS)
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static int pmc_core_dev_state_show(struct seq_file *s, void *unused)
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static int pmc_core_dev_state_get(void *data, u64 *val)
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{
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struct pmc_dev *pmcdev = s->private;
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u32 counter_val;
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struct pmc_dev *pmcdev = data;
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u32 value;
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counter_val = pmc_core_reg_read(pmcdev,
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SPT_PMC_SLP_S0_RES_COUNTER_OFFSET);
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seq_printf(s, "%u\n", pmc_core_adjust_slp_s0_step(counter_val));
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value = pmc_core_reg_read(pmcdev, SPT_PMC_SLP_S0_RES_COUNTER_OFFSET);
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*val = pmc_core_adjust_slp_s0_step(value);
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return 0;
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}
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static int pmc_core_dev_state_open(struct inode *inode, struct file *file)
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{
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return single_open(file, pmc_core_dev_state_show, inode->i_private);
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}
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static const struct file_operations pmc_core_dev_state_ops = {
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.open = pmc_core_dev_state_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = single_release,
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};
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DEFINE_DEBUGFS_ATTRIBUTE(pmc_core_dev_state, pmc_core_dev_state_get, NULL, "%llu\n");
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static void pmc_core_dbgfs_unregister(struct pmc_dev *pmcdev)
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{
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@ -112,12 +99,12 @@ static int pmc_core_dbgfs_register(struct pmc_dev *pmcdev)
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struct dentry *dir, *file;
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dir = debugfs_create_dir("pmc_core", NULL);
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if (!dir)
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if (IS_ERR_OR_NULL(dir))
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return -ENOMEM;
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pmcdev->dbgfs_dir = dir;
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file = debugfs_create_file("slp_s0_residency_usec", S_IFREG | S_IRUGO,
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dir, pmcdev, &pmc_core_dev_state_ops);
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dir, pmcdev, &pmc_core_dev_state);
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if (!file) {
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pmc_core_dbgfs_unregister(pmcdev);
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@ -126,16 +113,6 @@ static int pmc_core_dbgfs_register(struct pmc_dev *pmcdev)
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return 0;
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}
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#else
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static inline int pmc_core_dbgfs_register(struct pmc_dev *pmcdev)
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{
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return 0;
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}
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static inline void pmc_core_dbgfs_unregister(struct pmc_dev *pmcdev)
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{
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}
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#endif /* CONFIG_DEBUG_FS */
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static const struct x86_cpu_id intel_pmc_core_ids[] = {
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{ X86_VENDOR_INTEL, 6, 0x4e, X86_FEATURE_MWAIT,
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@ -182,10 +159,8 @@ static int pmc_core_probe(struct pci_dev *dev, const struct pci_device_id *id)
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}
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err = pmc_core_dbgfs_register(pmcdev);
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if (err < 0) {
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dev_err(&dev->dev, "PMC Core: debugfs register failed.\n");
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return err;
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}
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if (err < 0)
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dev_warn(&dev->dev, "PMC Core: debugfs register failed.\n");
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pmc.has_slp_s0_res = true;
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return 0;
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@ -23,6 +23,7 @@
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/* Sunrise Point Power Management Controller PCI Device ID */
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#define SPT_PMC_PCI_DEVICE_ID 0x9d21
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#define SPT_PMC_BASE_ADDR_OFFSET 0x48
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#define SPT_PMC_SLP_S0_RES_COUNTER_OFFSET 0x13c
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#define SPT_PMC_MMIO_REG_LEN 0x100
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@ -42,9 +43,7 @@
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struct pmc_dev {
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u32 base_addr;
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void __iomem *regbase;
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#if IS_ENABLED(CONFIG_DEBUG_FS)
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struct dentry *dbgfs_dir;
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#endif /* CONFIG_DEBUG_FS */
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bool has_slp_s0_res;
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};
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