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CRIS v32: increase NR_IRQS
Increase NR_IQRS so we can fit in GPIO interrupts. Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Jesper Nilsson <jespern@axis.com>
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parent
c33fe44443
commit
df90c33808
2 changed files with 3 additions and 3 deletions
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@ -464,14 +464,14 @@ init_IRQ(void)
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etrax_irv->v[i] = weird_irq;
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np = of_find_compatible_node(NULL, NULL, "axis,crisv32-intc");
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domain = irq_domain_add_legacy(np, NR_IRQS - FIRST_IRQ,
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domain = irq_domain_add_legacy(np, NBR_INTR_VECT - FIRST_IRQ,
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FIRST_IRQ, FIRST_IRQ,
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&crisv32_irq_ops, NULL);
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BUG_ON(!domain);
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irq_set_default_host(domain);
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of_node_put(np);
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for (i = FIRST_IRQ, j = 0; j < NR_IRQS; i++, j++) {
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for (i = FIRST_IRQ, j = 0; j < NBR_INTR_VECT; i++, j++) {
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set_exception_vector(i, interrupt[j]);
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}
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@ -4,7 +4,7 @@
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#include <hwregs/intr_vect.h>
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/* Number of non-cpu interrupts. */
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#define NR_IRQS NBR_INTR_VECT /* Exceptions + IRQs */
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#define NR_IRQS (NBR_INTR_VECT + 256) /* Exceptions + IRQs */
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#define FIRST_IRQ 0x31 /* Exception number for first IRQ */
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#define NR_REAL_IRQS (NBR_INTR_VECT - FIRST_IRQ) /* IRQs */
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#if NR_REAL_IRQS > 32
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