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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-21 16:29:59 +00:00
Merge branch 'sh-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* 'sh-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: sh: se/7724: Remove FSI/B of GPIO init code sh: se/7724: Update clock framework of FSI clock to non-legacy sh: Assume new page cache pages have dirty dcache lines. sh: boards: mach-se: use IS_ERR() instead of NULL check sh: Add div6_reparent_clks to clock framework for FSI dma: shdma: add a MODULE_ALIAS() to allow module autoloading
This commit is contained in:
commit
df9d38ebda
10 changed files with 66 additions and 87 deletions
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@ -720,32 +720,6 @@ static struct platform_device camera_devices[] = {
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};
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/* FSI */
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/*
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* FSI-B use external clock which came from da7210.
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* So, we should change parent of fsi
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*/
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#define FCLKBCR 0xa415000c
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static void fsimck_init(struct clk *clk)
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{
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u32 status = __raw_readl(clk->enable_reg);
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/* use external clock */
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status &= ~0x000000ff;
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status |= 0x00000080;
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__raw_writel(status, clk->enable_reg);
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}
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static struct clk_ops fsimck_clk_ops = {
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.init = fsimck_init,
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};
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static struct clk fsimckb_clk = {
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.ops = &fsimck_clk_ops,
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.enable_reg = (void __iomem *)FCLKBCR,
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.rate = 0, /* unknown */
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};
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static struct sh_fsi_platform_info fsi_info = {
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.portb_flags = SH_FSI_BRS_INV |
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SH_FSI_OUT_SLAVE_MODE |
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@ -1264,10 +1238,10 @@ static int __init arch_setup(void)
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/* change parent of FSI B */
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clk = clk_get(NULL, "fsib_clk");
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if (!IS_ERR(clk)) {
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clk_register(&fsimckb_clk);
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clk_set_parent(clk, &fsimckb_clk);
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clk_set_rate(clk, 11000);
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clk_set_rate(&fsimckb_clk, 11000);
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/* 48kHz dummy clock was used to make sure 1/1 divide */
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clk_set_rate(&sh7724_fsimckb_clk, 48000);
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clk_set_parent(clk, &sh7724_fsimckb_clk);
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clk_set_rate(clk, 48000);
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clk_put(clk);
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}
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@ -283,31 +283,6 @@ static struct platform_device ceu1_device = {
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};
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/* FSI */
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/*
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* FSI-A use external clock which came from ak464x.
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* So, we should change parent of fsi
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*/
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#define FCLKACR 0xa4150008
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static void fsimck_init(struct clk *clk)
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{
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u32 status = __raw_readl(clk->enable_reg);
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/* use external clock */
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status &= ~0x000000ff;
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status |= 0x00000080;
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__raw_writel(status, clk->enable_reg);
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}
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static struct clk_ops fsimck_clk_ops = {
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.init = fsimck_init,
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};
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static struct clk fsimcka_clk = {
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.ops = &fsimck_clk_ops,
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.enable_reg = (void __iomem *)FCLKACR,
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.rate = 0, /* unknown */
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};
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/* change J20, J21, J22 pin to 1-2 connection to use slave mode */
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static struct sh_fsi_platform_info fsi_info = {
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.porta_flags = SH_FSI_BRS_INV |
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@ -852,37 +827,29 @@ static int __init devices_setup(void)
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gpio_request(GPIO_FN_KEYOUT0, NULL);
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/* enable FSI */
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gpio_request(GPIO_FN_FSIMCKB, NULL);
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gpio_request(GPIO_FN_FSIMCKA, NULL);
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gpio_request(GPIO_FN_FSIIASD, NULL);
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gpio_request(GPIO_FN_FSIOASD, NULL);
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gpio_request(GPIO_FN_FSIIABCK, NULL);
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gpio_request(GPIO_FN_FSIIALRCK, NULL);
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gpio_request(GPIO_FN_FSIOABCK, NULL);
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gpio_request(GPIO_FN_FSIOALRCK, NULL);
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gpio_request(GPIO_FN_CLKAUDIOAO, NULL);
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gpio_request(GPIO_FN_FSIIBSD, NULL);
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gpio_request(GPIO_FN_FSIOBSD, NULL);
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gpio_request(GPIO_FN_FSIIBBCK, NULL);
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gpio_request(GPIO_FN_FSIIBLRCK, NULL);
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gpio_request(GPIO_FN_FSIOBBCK, NULL);
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gpio_request(GPIO_FN_FSIOBLRCK, NULL);
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gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
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gpio_request(GPIO_FN_FSIIASD, NULL);
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/* set SPU2 clock to 83.4 MHz */
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clk = clk_get(NULL, "spu_clk");
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if (clk) {
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if (!IS_ERR(clk)) {
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clk_set_rate(clk, clk_round_rate(clk, 83333333));
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clk_put(clk);
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}
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/* change parent of FSI A */
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clk = clk_get(NULL, "fsia_clk");
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if (clk) {
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clk_register(&fsimcka_clk);
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clk_set_parent(clk, &fsimcka_clk);
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clk_set_rate(clk, 11000);
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clk_set_rate(&fsimcka_clk, 11000);
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if (!IS_ERR(clk)) {
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/* 48kHz dummy clock was used to make sure 1/1 divide */
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clk_set_rate(&sh7724_fsimcka_clk, 48000);
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clk_set_parent(clk, &sh7724_fsimcka_clk);
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clk_set_rate(clk, 48000);
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clk_put(clk);
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}
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@ -96,7 +96,7 @@ void kmap_coherent_init(void);
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void *kmap_coherent(struct page *page, unsigned long addr);
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void kunmap_coherent(void *kvaddr);
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#define PG_dcache_dirty PG_arch_1
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#define PG_dcache_clean PG_arch_1
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void cpu_cache_init(void);
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@ -303,4 +303,7 @@ enum {
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SHDMA_SLAVE_SDHI1_RX,
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};
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extern struct clk sh7724_fsimcka_clk;
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extern struct clk sh7724_fsimckb_clk;
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#endif /* __ASM_SH7724_H__ */
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@ -111,12 +111,21 @@ static struct clk div3_clk = {
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.parent = &pll_clk,
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};
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/* External input clock (pin name: FSIMCKA/FSIMCKB ) */
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struct clk sh7724_fsimcka_clk = {
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};
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struct clk sh7724_fsimckb_clk = {
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};
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static struct clk *main_clks[] = {
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&r_clk,
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&extal_clk,
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&fll_clk,
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&pll_clk,
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&div3_clk,
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&sh7724_fsimcka_clk,
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&sh7724_fsimckb_clk,
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};
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static void div4_kick(struct clk *clk)
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@ -154,16 +163,38 @@ struct clk div4_clks[DIV4_NR] = {
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[DIV4_M1] = DIV4(FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT),
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};
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enum { DIV6_V, DIV6_FA, DIV6_FB, DIV6_I, DIV6_S, DIV6_NR };
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enum { DIV6_V, DIV6_I, DIV6_S, DIV6_NR };
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static struct clk div6_clks[DIV6_NR] = {
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[DIV6_V] = SH_CLK_DIV6(&div3_clk, VCLKCR, 0),
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[DIV6_FA] = SH_CLK_DIV6(&div3_clk, FCLKACR, 0),
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[DIV6_FB] = SH_CLK_DIV6(&div3_clk, FCLKBCR, 0),
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[DIV6_I] = SH_CLK_DIV6(&div3_clk, IRDACLKCR, 0),
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[DIV6_S] = SH_CLK_DIV6(&div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT),
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};
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enum { DIV6_FA, DIV6_FB, DIV6_REPARENT_NR };
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/* Indices are important - they are the actual src selecting values */
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static struct clk *fclkacr_parent[] = {
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[0] = &div3_clk,
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[1] = NULL,
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[2] = &sh7724_fsimcka_clk,
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[3] = NULL,
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};
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static struct clk *fclkbcr_parent[] = {
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[0] = &div3_clk,
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[1] = NULL,
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[2] = &sh7724_fsimckb_clk,
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[3] = NULL,
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};
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static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
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[DIV6_FA] = SH_CLK_DIV6_EXT(&div3_clk, FCLKACR, 0,
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fclkacr_parent, ARRAY_SIZE(fclkacr_parent), 6, 2),
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[DIV6_FB] = SH_CLK_DIV6_EXT(&div3_clk, FCLKBCR, 0,
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fclkbcr_parent, ARRAY_SIZE(fclkbcr_parent), 6, 2),
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};
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static struct clk mstp_clks[HWBLK_NR] = {
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SH_HWBLK_CLK(HWBLK_TLB, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
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SH_HWBLK_CLK(HWBLK_IC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
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@ -240,8 +271,8 @@ static struct clk_lookup lookups[] = {
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/* DIV6 clocks */
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CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]),
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CLKDEV_CON_ID("fsia_clk", &div6_clks[DIV6_FA]),
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CLKDEV_CON_ID("fsib_clk", &div6_clks[DIV6_FB]),
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CLKDEV_CON_ID("fsia_clk", &div6_reparent_clks[DIV6_FA]),
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CLKDEV_CON_ID("fsib_clk", &div6_reparent_clks[DIV6_FB]),
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CLKDEV_CON_ID("irda_clk", &div6_clks[DIV6_I]),
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CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_S]),
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@ -375,6 +406,9 @@ int __init arch_clk_init(void)
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if (!ret)
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ret = sh_clk_div6_register(div6_clks, DIV6_NR);
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if (!ret)
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ret = sh_clk_div6_reparent_register(div6_reparent_clks, DIV6_REPARENT_NR);
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if (!ret)
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ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR);
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@ -114,7 +114,7 @@ static void sh4_flush_dcache_page(void *arg)
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struct address_space *mapping = page_mapping(page);
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if (mapping && !mapping_mapped(mapping))
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set_bit(PG_dcache_dirty, &page->flags);
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clear_bit(PG_dcache_clean, &page->flags);
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else
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#endif
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flush_cache_one(CACHE_OC_ADDRESS_ARRAY |
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@ -239,7 +239,7 @@ static void sh4_flush_cache_page(void *args)
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* another ASID than the current one.
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*/
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map_coherent = (current_cpu_data.dcache.n_aliases &&
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!test_bit(PG_dcache_dirty, &page->flags) &&
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test_bit(PG_dcache_clean, &page->flags) &&
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page_mapped(page));
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if (map_coherent)
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vaddr = kmap_coherent(page, address);
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@ -139,7 +139,7 @@ static void sh7705_flush_dcache_page(void *arg)
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struct address_space *mapping = page_mapping(page);
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if (mapping && !mapping_mapped(mapping))
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set_bit(PG_dcache_dirty, &page->flags);
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clear_bit(PG_dcache_clean, &page->flags);
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else
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__flush_dcache_page(__pa(page_address(page)));
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}
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@ -60,14 +60,14 @@ void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
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unsigned long len)
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{
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if (boot_cpu_data.dcache.n_aliases && page_mapped(page) &&
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!test_bit(PG_dcache_dirty, &page->flags)) {
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test_bit(PG_dcache_clean, &page->flags)) {
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void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
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memcpy(vto, src, len);
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kunmap_coherent(vto);
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} else {
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memcpy(dst, src, len);
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if (boot_cpu_data.dcache.n_aliases)
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set_bit(PG_dcache_dirty, &page->flags);
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clear_bit(PG_dcache_clean, &page->flags);
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}
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if (vma->vm_flags & VM_EXEC)
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@ -79,14 +79,14 @@ void copy_from_user_page(struct vm_area_struct *vma, struct page *page,
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unsigned long len)
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{
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if (boot_cpu_data.dcache.n_aliases && page_mapped(page) &&
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!test_bit(PG_dcache_dirty, &page->flags)) {
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test_bit(PG_dcache_clean, &page->flags)) {
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void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
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memcpy(dst, vfrom, len);
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kunmap_coherent(vfrom);
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} else {
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memcpy(dst, src, len);
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if (boot_cpu_data.dcache.n_aliases)
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set_bit(PG_dcache_dirty, &page->flags);
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clear_bit(PG_dcache_clean, &page->flags);
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}
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}
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@ -98,7 +98,7 @@ void copy_user_highpage(struct page *to, struct page *from,
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vto = kmap_atomic(to, KM_USER1);
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if (boot_cpu_data.dcache.n_aliases && page_mapped(from) &&
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!test_bit(PG_dcache_dirty, &from->flags)) {
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test_bit(PG_dcache_clean, &from->flags)) {
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vfrom = kmap_coherent(from, vaddr);
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copy_page(vto, vfrom);
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kunmap_coherent(vfrom);
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@ -141,7 +141,7 @@ void __update_cache(struct vm_area_struct *vma,
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page = pfn_to_page(pfn);
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if (pfn_valid(pfn)) {
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int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags);
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int dirty = !test_and_set_bit(PG_dcache_clean, &page->flags);
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if (dirty)
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__flush_purge_region(page_address(page), PAGE_SIZE);
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}
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@ -153,7 +153,7 @@ void __flush_anon_page(struct page *page, unsigned long vmaddr)
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if (pages_do_alias(addr, vmaddr)) {
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if (boot_cpu_data.dcache.n_aliases && page_mapped(page) &&
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!test_bit(PG_dcache_dirty, &page->flags)) {
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test_bit(PG_dcache_clean, &page->flags)) {
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void *kaddr;
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kaddr = kmap_coherent(page, vmaddr);
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@ -34,7 +34,7 @@ void *kmap_coherent(struct page *page, unsigned long addr)
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enum fixed_addresses idx;
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unsigned long vaddr;
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BUG_ON(test_bit(PG_dcache_dirty, &page->flags));
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BUG_ON(!test_bit(PG_dcache_clean, &page->flags));
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pagefault_disable();
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@ -1213,3 +1213,4 @@ module_exit(sh_dmae_exit);
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MODULE_AUTHOR("Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>");
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MODULE_DESCRIPTION("Renesas SH DMA Engine driver");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:sh-dma-engine");
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