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ARM: shmobile: emev2: Setup internal peripheral interrupts as level high
Interrupts generated by SoC internal devices are currently marked as IRQ_TYPE_NONE. As they're level-triggered and active-high, mark them as such. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
parent
3dc76086fa
commit
e05ab0bb14
1 changed files with 15 additions and 15 deletions
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@ -130,7 +130,7 @@ sti_sclk: sti_sclk {
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sti@e0180000 {
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sti@e0180000 {
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compatible = "renesas,em-sti";
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compatible = "renesas,em-sti";
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reg = <0xe0180000 0x54>;
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reg = <0xe0180000 0x54>;
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interrupts = <0 125 IRQ_TYPE_NONE>;
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interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&sti_sclk>;
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clocks = <&sti_sclk>;
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clock-names = "sclk";
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clock-names = "sclk";
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};
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};
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@ -138,7 +138,7 @@ sti@e0180000 {
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uart@e1020000 {
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uart@e1020000 {
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compatible = "renesas,em-uart";
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compatible = "renesas,em-uart";
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reg = <0xe1020000 0x38>;
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reg = <0xe1020000 0x38>;
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interrupts = <0 8 IRQ_TYPE_NONE>;
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interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&usia_u0_sclk>;
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clocks = <&usia_u0_sclk>;
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clock-names = "sclk";
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clock-names = "sclk";
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};
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};
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@ -146,7 +146,7 @@ uart@e1020000 {
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uart@e1030000 {
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uart@e1030000 {
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compatible = "renesas,em-uart";
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compatible = "renesas,em-uart";
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reg = <0xe1030000 0x38>;
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reg = <0xe1030000 0x38>;
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interrupts = <0 9 IRQ_TYPE_NONE>;
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interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&usib_u1_sclk>;
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clocks = <&usib_u1_sclk>;
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clock-names = "sclk";
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clock-names = "sclk";
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};
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};
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@ -154,7 +154,7 @@ uart@e1030000 {
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uart@e1040000 {
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uart@e1040000 {
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compatible = "renesas,em-uart";
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compatible = "renesas,em-uart";
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reg = <0xe1040000 0x38>;
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reg = <0xe1040000 0x38>;
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interrupts = <0 10 IRQ_TYPE_NONE>;
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interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&usib_u2_sclk>;
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clocks = <&usib_u2_sclk>;
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clock-names = "sclk";
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clock-names = "sclk";
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};
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};
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@ -162,7 +162,7 @@ uart@e1040000 {
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uart@e1050000 {
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uart@e1050000 {
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compatible = "renesas,em-uart";
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compatible = "renesas,em-uart";
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reg = <0xe1050000 0x38>;
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reg = <0xe1050000 0x38>;
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interrupts = <0 11 IRQ_TYPE_NONE>;
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interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&usib_u3_sclk>;
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clocks = <&usib_u3_sclk>;
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clock-names = "sclk";
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clock-names = "sclk";
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};
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};
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@ -170,8 +170,8 @@ uart@e1050000 {
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gpio0: gpio@e0050000 {
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gpio0: gpio@e0050000 {
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compatible = "renesas,em-gio";
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compatible = "renesas,em-gio";
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reg = <0xe0050000 0x2c>, <0xe0050040 0x20>;
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reg = <0xe0050000 0x2c>, <0xe0050040 0x20>;
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interrupts = <0 67 IRQ_TYPE_NONE>,
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interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>,
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<0 68 IRQ_TYPE_NONE>;
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<0 68 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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gpio-controller;
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#gpio-cells = <2>;
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#gpio-cells = <2>;
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ngpios = <32>;
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ngpios = <32>;
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@ -181,8 +181,8 @@ gpio0: gpio@e0050000 {
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gpio1: gpio@e0050080 {
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gpio1: gpio@e0050080 {
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compatible = "renesas,em-gio";
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compatible = "renesas,em-gio";
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reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>;
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reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>;
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interrupts = <0 69 IRQ_TYPE_NONE>,
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interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>,
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<0 70 IRQ_TYPE_NONE>;
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<0 70 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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gpio-controller;
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#gpio-cells = <2>;
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#gpio-cells = <2>;
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ngpios = <32>;
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ngpios = <32>;
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@ -192,8 +192,8 @@ gpio1: gpio@e0050080 {
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gpio2: gpio@e0050100 {
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gpio2: gpio@e0050100 {
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compatible = "renesas,em-gio";
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compatible = "renesas,em-gio";
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reg = <0xe0050100 0x2c>, <0xe0050140 0x20>;
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reg = <0xe0050100 0x2c>, <0xe0050140 0x20>;
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interrupts = <0 71 IRQ_TYPE_NONE>,
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interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>,
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<0 72 IRQ_TYPE_NONE>;
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<0 72 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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gpio-controller;
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#gpio-cells = <2>;
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#gpio-cells = <2>;
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ngpios = <32>;
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ngpios = <32>;
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@ -203,8 +203,8 @@ gpio2: gpio@e0050100 {
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gpio3: gpio@e0050180 {
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gpio3: gpio@e0050180 {
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compatible = "renesas,em-gio";
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compatible = "renesas,em-gio";
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reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>;
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reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>;
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interrupts = <0 73 IRQ_TYPE_NONE>,
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interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>,
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<0 74 IRQ_TYPE_NONE>;
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<0 74 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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gpio-controller;
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#gpio-cells = <2>;
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#gpio-cells = <2>;
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ngpios = <32>;
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ngpios = <32>;
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@ -214,8 +214,8 @@ gpio3: gpio@e0050180 {
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gpio4: gpio@e0050200 {
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gpio4: gpio@e0050200 {
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compatible = "renesas,em-gio";
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compatible = "renesas,em-gio";
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reg = <0xe0050200 0x2c>, <0xe0050240 0x20>;
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reg = <0xe0050200 0x2c>, <0xe0050240 0x20>;
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interrupts = <0 75 IRQ_TYPE_NONE>,
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interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>,
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<0 76 IRQ_TYPE_NONE>;
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<0 76 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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gpio-controller;
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#gpio-cells = <2>;
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#gpio-cells = <2>;
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ngpios = <31>;
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ngpios = <31>;
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