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drm/amdgpu/soc15: add Raven golden setting

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Add the common golden settings for Raven.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Chunming Zhou 2016-12-08 10:16:00 +08:00 committed by Alex Deucher
parent 1023b797d1
commit e0ab957868
1 changed files with 9 additions and 0 deletions
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9
drivers/gpu/drm/amd/amdgpu/soc15.c
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@ -206,6 +206,10 @@ static const u32 vega10_golden_init[] =
{
};
static const u32 raven_golden_init[] =
{
};
static void soc15_init_golden_registers(struct amdgpu_device *adev)
{
/* Some of the registers might be dependent on GRBM_GFX_INDEX */
@ -217,6 +221,11 @@ static void soc15_init_golden_registers(struct amdgpu_device *adev)
vega10_golden_init,
(const u32)ARRAY_SIZE(vega10_golden_init));
break;
case CHIP_RAVEN:
amdgpu_program_register_sequence(adev,
raven_golden_init,
(const u32)ARRAY_SIZE(raven_golden_init));
break;
default:
break;
}