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ARM: imx53: qsrb: fix PMIC interrupt level
The MC34708 PMIC interrupt level is active high, but was set to active low in the devicetree, probably as a result of a copy and paste error from the QSB board. This caused IRQ storms and led to the kernel disabling the PMIC interrupt. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -36,7 +36,7 @@ pmic: mc34708@8 {
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pinctrl-0 = <&pinctrl_pmic>;
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pinctrl-0 = <&pinctrl_pmic>;
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reg = <0x08>;
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reg = <0x08>;
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interrupt-parent = <&gpio5>;
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interrupt-parent = <&gpio5>;
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interrupts = <23 0x8>;
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interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
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regulators {
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regulators {
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sw1_reg: sw1a {
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sw1_reg: sw1a {
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regulator-name = "SW1";
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regulator-name = "SW1";
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