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KVM: PPC: Book3S HV: Make radix use correct tlbie sequence in kvmppc_radix_tlbie_page
The standard eieio ; tlbsync ; ptesync must follow tlbie to ensure it is ordered with respect to subsequent operations. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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1 changed files with 2 additions and 2 deletions
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@ -162,7 +162,7 @@ static void kvmppc_radix_tlbie_page(struct kvm *kvm, unsigned long addr,
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if (cpu_has_feature(CPU_FTR_P9_TLBIE_BUG))
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asm volatile(PPC_TLBIE_5(%0, %1, 0, 0, 1)
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: : "r" (addr), "r" (kvm->arch.lpid) : "memory");
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asm volatile("ptesync": : :"memory");
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asm volatile("eieio ; tlbsync ; ptesync": : :"memory");
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}
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static void kvmppc_radix_flush_pwc(struct kvm *kvm, unsigned long addr)
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@ -173,7 +173,7 @@ static void kvmppc_radix_flush_pwc(struct kvm *kvm, unsigned long addr)
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/* RIC=1 PRS=0 R=1 IS=2 */
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asm volatile(PPC_TLBIE_5(%0, %1, 1, 0, 1)
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: : "r" (rb), "r" (kvm->arch.lpid) : "memory");
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asm volatile("ptesync": : :"memory");
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asm volatile("eieio ; tlbsync ; ptesync": : :"memory");
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}
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unsigned long kvmppc_radix_update_pte(struct kvm *kvm, pte_t *ptep,
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