diff --git a/MAINTAINERS b/MAINTAINERS index 7d4b5cc07ad8..6150c80bccf6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -923,6 +923,12 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) W: http://www.mcuos.com S: Maintained +ARM/U8500 ARM ARCHITECTURE +M: Srinidhi Kasagar +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) +S: Maintained +F: arch/arm/mach-ux500/ + ARM/VFP SUPPORT M: Russell King L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 1c4119c60040..1ae18d879e12 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -702,6 +702,16 @@ config ARCH_BCMRING help Support for Broadcom's BCMRing platform. +config ARCH_U8500 + bool "ST-Ericsson U8500 Series" + select CPU_V7 + select ARM_AMBA + select GENERIC_TIME + select GENERIC_CLOCKEVENTS + select COMMON_CLKDEV + help + Support for ST-Ericsson's Ux500 architecture + endchoice source "arch/arm/mach-clps711x/Kconfig" @@ -787,6 +797,7 @@ source "arch/arm/mach-at91/Kconfig" source "arch/arm/plat-mxc/Kconfig" source "arch/arm/mach-nomadik/Kconfig" +source "arch/arm/plat-nomadik/Kconfig" source "arch/arm/mach-netx/Kconfig" @@ -804,6 +815,8 @@ source "arch/arm/mach-w90x900/Kconfig" source "arch/arm/mach-bcmring/Kconfig" +source "arch/arm/mach-ux500/Kconfig" + # Definitions to make life easier config ARCH_ACORN bool @@ -955,10 +968,10 @@ source "kernel/time/Kconfig" config SMP bool "Symmetric Multi-Processing (EXPERIMENTAL)" depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP ||\ - MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4) + MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || ARCH_U8500) depends on GENERIC_CLOCKEVENTS select USE_GENERIC_SMP_HELPERS - select HAVE_ARM_SCU if (ARCH_REALVIEW || ARCH_OMAP4) + select HAVE_ARM_SCU if (ARCH_REALVIEW || ARCH_OMAP4 || ARCH_U8500) help This enables support for systems with more than one CPU. If you have a system with only one CPU, like most personal computers, say N. If @@ -1027,9 +1040,9 @@ config HOTPLUG_CPU config LOCAL_TIMERS bool "Use local timer interrupts" depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || \ - REALVIEW_EB_A9MP || MACH_REALVIEW_PBX || ARCH_OMAP4) + REALVIEW_EB_A9MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || ARCH_U8500) default y - select HAVE_ARM_TWD if (ARCH_REALVIEW || ARCH_OMAP4) + select HAVE_ARM_TWD if (ARCH_REALVIEW || ARCH_OMAP4 || ARCH_U8500) help Enable support for local timers on SMP platforms, rather then the legacy IPI broadcast method. Local timers allows the system diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 1a6f70e52921..ff54c23d085e 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -83,6 +83,14 @@ config DEBUG_ICEDCC It does include a timeout to ensure that the system does not totally freeze when there is nothing connected to read. +config OC_ETM + bool "On-chip ETM and ETB" + select ARM_AMBA + help + Enables the on-chip embedded trace macrocell and embedded trace + buffer driver that will allow you to collect traces of the + kernel code. + config DEBUG_DC21285_PORT bool "Kernel low-level debugging messages via footbridge serial port" depends on DEBUG_LL && FOOTBRIDGE diff --git a/arch/arm/Makefile b/arch/arm/Makefile index a73caaf66763..7603eba7c0cd 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -166,6 +166,7 @@ machine-$(CONFIG_ARCH_SHARK) := shark machine-$(CONFIG_ARCH_STMP378X) := stmp378x machine-$(CONFIG_ARCH_STMP37XX) := stmp37xx machine-$(CONFIG_ARCH_U300) := u300 +machine-$(CONFIG_ARCH_U8500) := ux500 machine-$(CONFIG_ARCH_VERSATILE) := versatile machine-$(CONFIG_ARCH_W90X900) := w90x900 machine-$(CONFIG_FOOTBRIDGE) := footbridge @@ -176,6 +177,7 @@ machine-$(CONFIG_ARCH_MXC91231) := mxc91231 plat-$(CONFIG_ARCH_MXC) := mxc plat-$(CONFIG_ARCH_OMAP) := omap plat-$(CONFIG_PLAT_IOP) := iop +plat-$(CONFIG_PLAT_NOMADIK) := nomadik plat-$(CONFIG_PLAT_ORION) := orion plat-$(CONFIG_PLAT_PXA) := pxa plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx s3c diff --git a/arch/arm/configs/at91rm9200dk_defconfig b/arch/arm/configs/at91rm9200dk_defconfig index 238b218394e3..c97e1022ada1 100644 --- a/arch/arm/configs/at91rm9200dk_defconfig +++ b/arch/arm/configs/at91rm9200dk_defconfig @@ -120,6 +120,7 @@ CONFIG_ARCH_AT91RM9200DK=y # CONFIG_MACH_CARMEVA is not set # CONFIG_MACH_KB9200 is not set # CONFIG_MACH_ATEB9200 is not set +CONFIG_MACH_ECO920=y # # AT91RM9200 Feature Selections diff --git a/arch/arm/configs/w90p910_defconfig b/arch/arm/configs/nuc910_defconfig similarity index 100% rename from arch/arm/configs/w90p910_defconfig rename to arch/arm/configs/nuc910_defconfig diff --git a/arch/arm/configs/nuc950_defconfig b/arch/arm/configs/nuc950_defconfig new file mode 100644 index 000000000000..df1de9b45ca4 --- /dev/null +++ b/arch/arm/configs/nuc950_defconfig @@ -0,0 +1,922 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.32-rc7 +# Tue Nov 17 12:31:33 2009 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_TREE_PREEMPT_RCU is not set +# CONFIG_RCU_TRACE is not set +CONFIG_RCU_FANOUT=32 +# CONFIG_RCU_FANOUT_EXACT is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=17 +# CONFIG_GROUP_SCHED is not set +# CONFIG_CGROUPS is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +CONFIG_RELAY=y +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +CONFIG_USER_NS=y +# CONFIG_PID_NS is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +# CONFIG_EMBEDDED is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_EXTRA_PASS=y +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y + +# +# Kernel Performance Events And Counters +# +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_COMPAT_BRK=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +CONFIG_HAVE_OPROFILE=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_CLK=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +# CONFIG_SLOW_WORK is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +# CONFIG_MODULES is not set +CONFIG_BLOCK=y +CONFIG_LBDAF=y +CONFIG_BLK_DEV_BSG=y +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +# CONFIG_FREEZER is not set + +# +# System Type +# +CONFIG_MMU=y +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_STMP3XXX is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_NOMADIK is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +CONFIG_ARCH_W90X900=y +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_MSM is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_S5PC1XX is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_U300 is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_BCMRING is not set +CONFIG_CPU_NUC950=y + +# +# W90P910 Machines +# +# CONFIG_MACH_W90P910EVB is not set + +# +# NUC950 Machines +# +CONFIG_MACH_W90P950EVB=y + +# +# NUC960 Machines +# +# CONFIG_MACH_W90N960EVB is not set + +# +# NUC932 Machines +# +# CONFIG_MACH_NUC932EVB is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_PABRT_LEGACY=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set +CONFIG_ARM_L1_CACHE_SHIFT=5 +CONFIG_COMMON_CLKDEV=y + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +# CONFIG_HIGHMEM is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_VIRT_TO_BUS=y +CONFIG_HAVE_MLOCK=y +CONFIG_HAVE_MLOCKED_PAGE_BIT=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_CMDLINE="root=/dev/ram0 console=ttyS0,115200n8 rdinit=/sbin/init mem=64M" +# CONFIG_XIP_KERNEL is not set +CONFIG_KEXEC=y +CONFIG_ATAGS_PROC=y + +# +# CPU Power Management +# +# CONFIG_CPU_IDLE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set +# CONFIG_VFP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y +CONFIG_BINFMT_AOUT=y +CONFIG_BINFMT_MISC=y + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# CONFIG_NET is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +# CONFIG_DEVTMPFS is not set +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_CONCAT=y +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +# CONFIG_MTD_PHYSMAP_COMPAT is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=16384 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_MG_DISK is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_SCSI_PROC_FS is not set + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +# CONFIG_SCSI_LOWLEVEL is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +# CONFIG_DEVKMEM is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=1 +CONFIG_SERIAL_8250_RUNTIME_UARTS=1 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set + +# +# PPS support +# +# CONFIG_PPS is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_GPIO_SYSFS is not set + +# +# Memory mapped GPIO expanders: +# + +# +# I2C GPIO expanders: +# + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# + +# +# AC97 GPIO expanders: +# +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_WATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_REGULATOR is not set +# CONFIG_MEDIA_SUPPORT is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +# CONFIG_SOUND is not set +# CONFIG_HID_SUPPORT is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEVICEFS is not set +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set +CONFIG_USB_MON=y +# CONFIG_USB_WUSB is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_EHCI_HCD is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set +# CONFIG_USB_OHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HWA_HCD is not set +# CONFIG_USB_MUSB_HDRC is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_VST is not set +# CONFIG_USB_GADGET is not set + +# +# OTG and related infrastructure +# +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_MMC is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set +# CONFIG_DMADEVICES is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set + +# +# TI VLYNQ +# +# CONFIG_STAGING is not set + +# +# File systems +# +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +# CONFIG_DNOTIFY is not set +# CONFIG_INOTIFY is not set +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set +CONFIG_GENERIC_ACL=y + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +CONFIG_ROMFS_FS=y +CONFIG_ROMFS_BACKED_BY_BLOCK=y +# CONFIG_ROMFS_BACKED_BY_MTD is not set +# CONFIG_ROMFS_BACKED_BY_BOTH is not set +CONFIG_ROMFS_ON_BLOCK=y +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +# CONFIG_ENABLE_WARN_DEPRECATED is not set +# CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_MEMORY_INIT=y +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_LATENCYTOP is not set +# CONFIG_SYSCTL_SYSCALL_CHECK is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_ARM_UNWIND=y +# CONFIG_DEBUG_USER is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +# CONFIG_CRYPTO is not set +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_GENERIC_FIND_LAST_BIT=y +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +# CONFIG_CRC32 is not set +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/nuc960_defconfig b/arch/arm/configs/nuc960_defconfig new file mode 100644 index 000000000000..4b2cd9eae9bc --- /dev/null +++ b/arch/arm/configs/nuc960_defconfig @@ -0,0 +1,922 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.32-rc7 +# Tue Nov 17 12:20:11 2009 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_TREE_PREEMPT_RCU is not set +# CONFIG_RCU_TRACE is not set +CONFIG_RCU_FANOUT=32 +# CONFIG_RCU_FANOUT_EXACT is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=17 +# CONFIG_GROUP_SCHED is not set +# CONFIG_CGROUPS is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +CONFIG_RELAY=y +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +CONFIG_USER_NS=y +# CONFIG_PID_NS is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +# CONFIG_EMBEDDED is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_EXTRA_PASS=y +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y + +# +# Kernel Performance Events And Counters +# +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_COMPAT_BRK=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +CONFIG_HAVE_OPROFILE=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_CLK=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +# CONFIG_SLOW_WORK is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +# CONFIG_MODULES is not set +CONFIG_BLOCK=y +CONFIG_LBDAF=y +CONFIG_BLK_DEV_BSG=y +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +# CONFIG_FREEZER is not set + +# +# System Type +# +CONFIG_MMU=y +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_STMP3XXX is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_NOMADIK is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +CONFIG_ARCH_W90X900=y +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_MSM is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_S5PC1XX is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_U300 is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_BCMRING is not set +CONFIG_CPU_NUC960=y + +# +# W90P910 Machines +# +# CONFIG_MACH_W90P910EVB is not set + +# +# NUC950 Machines +# +# CONFIG_MACH_W90P950EVB is not set + +# +# NUC960 Machines +# +CONFIG_MACH_W90N960EVB=y + +# +# NUC932 Machines +# +# CONFIG_MACH_NUC932EVB is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_PABRT_LEGACY=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set +CONFIG_ARM_L1_CACHE_SHIFT=5 +CONFIG_COMMON_CLKDEV=y + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +# CONFIG_HIGHMEM is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_VIRT_TO_BUS=y +CONFIG_HAVE_MLOCK=y +CONFIG_HAVE_MLOCKED_PAGE_BIT=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_CMDLINE="root=/dev/ram0 console=ttyS0,115200n8 rdinit=/sbin/init mem=64M" +# CONFIG_XIP_KERNEL is not set +CONFIG_KEXEC=y +CONFIG_ATAGS_PROC=y + +# +# CPU Power Management +# +# CONFIG_CPU_IDLE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set +# CONFIG_VFP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y +CONFIG_BINFMT_AOUT=y +CONFIG_BINFMT_MISC=y + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# CONFIG_NET is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +# CONFIG_DEVTMPFS is not set +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_CONCAT=y +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +# CONFIG_MTD_PHYSMAP_COMPAT is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=16384 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_MG_DISK is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_SCSI_PROC_FS is not set + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +# CONFIG_SCSI_LOWLEVEL is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +# CONFIG_DEVKMEM is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=1 +CONFIG_SERIAL_8250_RUNTIME_UARTS=1 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set + +# +# PPS support +# +# CONFIG_PPS is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_GPIO_SYSFS is not set + +# +# Memory mapped GPIO expanders: +# + +# +# I2C GPIO expanders: +# + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# + +# +# AC97 GPIO expanders: +# +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_WATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_REGULATOR is not set +# CONFIG_MEDIA_SUPPORT is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +# CONFIG_SOUND is not set +# CONFIG_HID_SUPPORT is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEVICEFS is not set +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set +CONFIG_USB_MON=y +# CONFIG_USB_WUSB is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_EHCI_HCD is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set +# CONFIG_USB_OHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HWA_HCD is not set +# CONFIG_USB_MUSB_HDRC is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_VST is not set +# CONFIG_USB_GADGET is not set + +# +# OTG and related infrastructure +# +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_MMC is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set +# CONFIG_DMADEVICES is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set + +# +# TI VLYNQ +# +# CONFIG_STAGING is not set + +# +# File systems +# +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +# CONFIG_DNOTIFY is not set +# CONFIG_INOTIFY is not set +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set +CONFIG_GENERIC_ACL=y + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +CONFIG_ROMFS_FS=y +CONFIG_ROMFS_BACKED_BY_BLOCK=y +# CONFIG_ROMFS_BACKED_BY_MTD is not set +# CONFIG_ROMFS_BACKED_BY_BOTH is not set +CONFIG_ROMFS_ON_BLOCK=y +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +# CONFIG_ENABLE_WARN_DEPRECATED is not set +# CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_MEMORY_INIT=y +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_LATENCYTOP is not set +# CONFIG_SYSCTL_SYSCALL_CHECK is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_ARM_UNWIND=y +# CONFIG_DEBUG_USER is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +# CONFIG_CRYPTO is not set +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_GENERIC_FIND_LAST_BIT=y +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +# CONFIG_CRC32 is not set +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig new file mode 100644 index 000000000000..15fde22ce3f3 --- /dev/null +++ b/arch/arm/configs/u8500_defconfig @@ -0,0 +1,680 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.32-rc8 +# Mon Nov 30 11:11:29 2009 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_LOCKBREAK=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_BSD_PROCESS_ACCT is not set + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_TREE_PREEMPT_RCU is not set +# CONFIG_RCU_TRACE is not set +CONFIG_RCU_FANOUT=32 +# CONFIG_RCU_FANOUT_EXACT is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +# CONFIG_CGROUPS is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +# CONFIG_EMBEDDED is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y + +# +# Kernel Performance Events And Counters +# +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +CONFIG_COMPAT_BRK=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_USE_GENERIC_SMP_HELPERS=y + +# +# GCOV-based kernel profiling +# +# CONFIG_SLOW_WORK is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_STOP_MACHINE=y +CONFIG_BLOCK=y +# CONFIG_LBDAF is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +# CONFIG_FREEZER is not set + +# +# System Type +# +CONFIG_MMU=y +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_STMP3XXX is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_NOMADIK is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_MSM is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_S5PC1XX is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_U300 is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_BCMRING is not set +CONFIG_ARCH_U8500=y +CONFIG_PLAT_NOMADIK=y +CONFIG_HAS_MTU=y + +# +# ST-Ericsson platform type +# + +# +# ST-Ericsson Multicore Mobile Platforms +# +CONFIG_MACH_U8500_MOP=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_V7=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_PABRT_V7=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_ARM_THUMBEE is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_HAS_TLS_REG=y +CONFIG_ARM_L1_CACHE_SHIFT=5 +# CONFIG_ARM_ERRATA_430973 is not set +# CONFIG_ARM_ERRATA_458693 is not set +# CONFIG_ARM_ERRATA_460075 is not set +CONFIG_ARM_GIC=y +CONFIG_COMMON_CLKDEV=y + +# +# Bus support +# +CONFIG_ARM_AMBA=y +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_SMP=y +CONFIG_HAVE_ARM_SCU=y +CONFIG_HAVE_ARM_TWD=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_NR_CPUS=2 +# CONFIG_HOTPLUG_CPU is not set +CONFIG_LOCAL_TIMERS=y +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +CONFIG_HZ=100 +# CONFIG_THUMB2_KERNEL is not set +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +# CONFIG_HIGHMEM is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_VIRT_TO_BUS=y +CONFIG_HAVE_MLOCK=y +CONFIG_HAVE_MLOCKED_PAGE_BIT=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_CMDLINE="root=/dev/ram0 console=ttyAMA2,115200n8" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Power Management +# +# CONFIG_CPU_IDLE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_FPE_NWFPE is not set +# CONFIG_FPE_FASTFPE is not set +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_NEON=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# CONFIG_NET is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +# CONFIG_DEVTMPFS is not set +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_MTD is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=65536 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_DMA is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +# CONFIG_SERIAL_MAX3100 is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_BITBANG is not set +CONFIG_SPI_PL022=y + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set + +# +# PPS support +# +# CONFIG_PPS is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_WATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_MC13783 is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_REGULATOR is not set +# CONFIG_MEDIA_SUPPORT is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +# CONFIG_SOUND is not set +# CONFIG_HID_SUPPORT is not set +# CONFIG_USB_SUPPORT is not set +# CONFIG_MMC is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set +# CONFIG_DMADEVICES is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set + +# +# TI VLYNQ +# +# CONFIG_STAGING is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4_FS is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set +CONFIG_GENERIC_ACL=y + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +# CONFIG_HUGETLB_PAGE is not set +CONFIG_CONFIGFS_FS=m +# CONFIG_MISC_FILESYSTEMS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_NLS is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_DETECT_HUNG_TASK=y +# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 +# CONFIG_SCHED_DEBUG is not set +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_PREEMPT is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +CONFIG_DEBUG_MEMORY_INIT=y +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_CREDENTIALS is not set +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_SYSCTL_SYSCALL_CHECK is not set +# CONFIG_PAGE_POISONING is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_ARM_UNWIND=y +CONFIG_DEBUG_USER=y +CONFIG_DEBUG_ERRORS=y +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_LL is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +# CONFIG_CRYPTO is not set +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_GENERIC_FIND_LAST_BIT=y +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +CONFIG_CRC_T10DIF=m +# CONFIG_CRC_ITU_T is not set +# CONFIG_CRC32 is not set +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/include/asm/hardware/coresight.h b/arch/arm/include/asm/hardware/coresight.h new file mode 100644 index 000000000000..f82b25d4f73e --- /dev/null +++ b/arch/arm/include/asm/hardware/coresight.h @@ -0,0 +1,165 @@ +/* + * linux/arch/arm/include/asm/hardware/coresight.h + * + * CoreSight components' registers + * + * Copyright (C) 2009 Nokia Corporation. + * Alexander Shishkin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_HARDWARE_CORESIGHT_H +#define __ASM_HARDWARE_CORESIGHT_H + +#define TRACER_ACCESSED_BIT 0 +#define TRACER_RUNNING_BIT 1 +#define TRACER_CYCLE_ACC_BIT 2 +#define TRACER_ACCESSED BIT(TRACER_ACCESSED_BIT) +#define TRACER_RUNNING BIT(TRACER_RUNNING_BIT) +#define TRACER_CYCLE_ACC BIT(TRACER_CYCLE_ACC_BIT) + +struct tracectx { + unsigned int etb_bufsz; + void __iomem *etb_regs; + void __iomem *etm_regs; + unsigned long flags; + int ncmppairs; + int etm_portsz; + struct device *dev; + struct clk *emu_clk; + struct mutex mutex; +}; + +#define TRACER_TIMEOUT 10000 + +#define etm_writel(t, v, x) \ + (__raw_writel((v), (t)->etm_regs + (x))) +#define etm_readl(t, x) (__raw_readl((t)->etm_regs + (x))) + +/* CoreSight Management Registers */ +#define CSMR_LOCKACCESS 0xfb0 +#define CSMR_LOCKSTATUS 0xfb4 +#define CSMR_AUTHSTATUS 0xfb8 +#define CSMR_DEVID 0xfc8 +#define CSMR_DEVTYPE 0xfcc +/* CoreSight Component Registers */ +#define CSCR_CLASS 0xff4 + +#define CSCR_PRSR 0x314 + +#define UNLOCK_MAGIC 0xc5acce55 + +/* ETM control register, "ETM Architecture", 3.3.1 */ +#define ETMR_CTRL 0 +#define ETMCTRL_POWERDOWN 1 +#define ETMCTRL_PROGRAM (1 << 10) +#define ETMCTRL_PORTSEL (1 << 11) +#define ETMCTRL_DO_CONTEXTID (3 << 14) +#define ETMCTRL_PORTMASK1 (7 << 4) +#define ETMCTRL_PORTMASK2 (1 << 21) +#define ETMCTRL_PORTMASK (ETMCTRL_PORTMASK1 | ETMCTRL_PORTMASK2) +#define ETMCTRL_PORTSIZE(x) ((((x) & 7) << 4) | (!!((x) & 8)) << 21) +#define ETMCTRL_DO_CPRT (1 << 1) +#define ETMCTRL_DATAMASK (3 << 2) +#define ETMCTRL_DATA_DO_DATA (1 << 2) +#define ETMCTRL_DATA_DO_ADDR (1 << 3) +#define ETMCTRL_DATA_DO_BOTH (ETMCTRL_DATA_DO_DATA | ETMCTRL_DATA_DO_ADDR) +#define ETMCTRL_BRANCH_OUTPUT (1 << 8) +#define ETMCTRL_CYCLEACCURATE (1 << 12) + +/* ETM configuration code register */ +#define ETMR_CONFCODE (0x04) + +/* ETM trace start/stop resource control register */ +#define ETMR_TRACESSCTRL (0x18) + +/* ETM trigger event register */ +#define ETMR_TRIGEVT (0x08) + +/* address access type register bits, "ETM architecture", + * table 3-27 */ +/* - access type */ +#define ETMAAT_IFETCH 0 +#define ETMAAT_IEXEC 1 +#define ETMAAT_IEXECPASS 2 +#define ETMAAT_IEXECFAIL 3 +#define ETMAAT_DLOADSTORE 4 +#define ETMAAT_DLOAD 5 +#define ETMAAT_DSTORE 6 +/* - comparison access size */ +#define ETMAAT_JAVA (0 << 3) +#define ETMAAT_THUMB (1 << 3) +#define ETMAAT_ARM (3 << 3) +/* - data value comparison control */ +#define ETMAAT_NOVALCMP (0 << 5) +#define ETMAAT_VALMATCH (1 << 5) +#define ETMAAT_VALNOMATCH (3 << 5) +/* - exact match */ +#define ETMAAT_EXACTMATCH (1 << 7) +/* - context id comparator control */ +#define ETMAAT_IGNCONTEXTID (0 << 8) +#define ETMAAT_VALUE1 (1 << 8) +#define ETMAAT_VALUE2 (2 << 8) +#define ETMAAT_VALUE3 (3 << 8) +/* - security level control */ +#define ETMAAT_IGNSECURITY (0 << 10) +#define ETMAAT_NSONLY (1 << 10) +#define ETMAAT_SONLY (2 << 10) + +#define ETMR_COMP_VAL(x) (0x40 + (x) * 4) +#define ETMR_COMP_ACC_TYPE(x) (0x80 + (x) * 4) + +/* ETM status register, "ETM Architecture", 3.3.2 */ +#define ETMR_STATUS (0x10) +#define ETMST_OVERFLOW (1 << 0) +#define ETMST_PROGBIT (1 << 1) +#define ETMST_STARTSTOP (1 << 2) +#define ETMST_TRIGGER (1 << 3) + +#define etm_progbit(t) (etm_readl((t), ETMR_STATUS) & ETMST_PROGBIT) +#define etm_started(t) (etm_readl((t), ETMR_STATUS) & ETMST_STARTSTOP) +#define etm_triggered(t) (etm_readl((t), ETMR_STATUS) & ETMST_TRIGGER) + +#define ETMR_TRACEENCTRL2 0x1c +#define ETMR_TRACEENCTRL 0x24 +#define ETMTE_INCLEXCL (1 << 24) +#define ETMR_TRACEENEVT 0x20 +#define ETMCTRL_OPTS (ETMCTRL_DO_CPRT | \ + ETMCTRL_DATA_DO_ADDR | \ + ETMCTRL_BRANCH_OUTPUT | \ + ETMCTRL_DO_CONTEXTID) + +/* ETB registers, "CoreSight Components TRM", 9.3 */ +#define ETBR_DEPTH 0x04 +#define ETBR_STATUS 0x0c +#define ETBR_READMEM 0x10 +#define ETBR_READADDR 0x14 +#define ETBR_WRITEADDR 0x18 +#define ETBR_TRIGGERCOUNT 0x1c +#define ETBR_CTRL 0x20 +#define ETBR_FORMATTERCTRL 0x304 +#define ETBFF_ENFTC 1 +#define ETBFF_ENFCONT (1 << 1) +#define ETBFF_FONFLIN (1 << 4) +#define ETBFF_MANUAL_FLUSH (1 << 6) +#define ETBFF_TRIGIN (1 << 8) +#define ETBFF_TRIGEVT (1 << 9) +#define ETBFF_TRIGFL (1 << 10) + +#define etb_writel(t, v, x) \ + (__raw_writel((v), (t)->etb_regs + (x))) +#define etb_readl(t, x) (__raw_readl((t)->etb_regs + (x))) + +#define etm_lock(t) do { etm_writel((t), 0, CSMR_LOCKACCESS); } while (0) +#define etm_unlock(t) \ + do { etm_writel((t), UNLOCK_MAGIC, CSMR_LOCKACCESS); } while (0) + +#define etb_lock(t) do { etb_writel((t), 0, CSMR_LOCKACCESS); } while (0) +#define etb_unlock(t) \ + do { etb_writel((t), UNLOCK_MAGIC, CSMR_LOCKACCESS); } while (0) + +#endif /* __ASM_HARDWARE_CORESIGHT_H */ + diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index 79087dd6d869..e7ccf7e697ce 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@ -17,6 +17,8 @@ obj-y := compat.o elf.o entry-armv.o entry-common.o irq.o \ process.o ptrace.o return_address.o setup.o signal.o \ sys_arm.o stacktrace.o time.o traps.o +obj-$(CONFIG_OC_ETM) += etm.o + obj-$(CONFIG_ISA_DMA_API) += dma.o obj-$(CONFIG_ARCH_ACORN) += ecard.o obj-$(CONFIG_FIQ) += fiq.o diff --git a/arch/arm/kernel/etm.c b/arch/arm/kernel/etm.c new file mode 100644 index 000000000000..827753966301 --- /dev/null +++ b/arch/arm/kernel/etm.c @@ -0,0 +1,641 @@ +/* + * linux/arch/arm/kernel/etm.c + * + * Driver for ARM's Embedded Trace Macrocell and Embedded Trace Buffer. + * + * Copyright (C) 2009 Nokia Corporation. + * Alexander Shishkin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Alexander Shishkin"); + +static struct tracectx tracer; + +static inline bool trace_isrunning(struct tracectx *t) +{ + return !!(t->flags & TRACER_RUNNING); +} + +static int etm_setup_address_range(struct tracectx *t, int n, + unsigned long start, unsigned long end, int exclude, int data) +{ + u32 flags = ETMAAT_ARM | ETMAAT_IGNCONTEXTID | ETMAAT_NSONLY | \ + ETMAAT_NOVALCMP; + + if (n < 1 || n > t->ncmppairs) + return -EINVAL; + + /* comparators and ranges are numbered starting with 1 as opposed + * to bits in a word */ + n--; + + if (data) + flags |= ETMAAT_DLOADSTORE; + else + flags |= ETMAAT_IEXEC; + + /* first comparator for the range */ + etm_writel(t, flags, ETMR_COMP_ACC_TYPE(n * 2)); + etm_writel(t, start, ETMR_COMP_VAL(n * 2)); + + /* second comparator is right next to it */ + etm_writel(t, flags, ETMR_COMP_ACC_TYPE(n * 2 + 1)); + etm_writel(t, end, ETMR_COMP_VAL(n * 2 + 1)); + + flags = exclude ? ETMTE_INCLEXCL : 0; + etm_writel(t, flags | (1 << n), ETMR_TRACEENCTRL); + + return 0; +} + +static int trace_start(struct tracectx *t) +{ + u32 v; + unsigned long timeout = TRACER_TIMEOUT; + + etb_unlock(t); + + etb_writel(t, 0, ETBR_FORMATTERCTRL); + etb_writel(t, 1, ETBR_CTRL); + + etb_lock(t); + + /* configure etm */ + v = ETMCTRL_OPTS | ETMCTRL_PROGRAM | ETMCTRL_PORTSIZE(t->etm_portsz); + + if (t->flags & TRACER_CYCLE_ACC) + v |= ETMCTRL_CYCLEACCURATE; + + etm_unlock(t); + + etm_writel(t, v, ETMR_CTRL); + + while (!(etm_readl(t, ETMR_CTRL) & ETMCTRL_PROGRAM) && --timeout) + ; + if (!timeout) { + dev_dbg(t->dev, "Waiting for progbit to assert timed out\n"); + etm_lock(t); + return -EFAULT; + } + + etm_setup_address_range(t, 1, (unsigned long)_stext, + (unsigned long)_etext, 0, 0); + etm_writel(t, 0, ETMR_TRACEENCTRL2); + etm_writel(t, 0, ETMR_TRACESSCTRL); + etm_writel(t, 0x6f, ETMR_TRACEENEVT); + + v &= ~ETMCTRL_PROGRAM; + v |= ETMCTRL_PORTSEL; + + etm_writel(t, v, ETMR_CTRL); + + timeout = TRACER_TIMEOUT; + while (etm_readl(t, ETMR_CTRL) & ETMCTRL_PROGRAM && --timeout) + ; + if (!timeout) { + dev_dbg(t->dev, "Waiting for progbit to deassert timed out\n"); + etm_lock(t); + return -EFAULT; + } + + etm_lock(t); + + t->flags |= TRACER_RUNNING; + + return 0; +} + +static int trace_stop(struct tracectx *t) +{ + unsigned long timeout = TRACER_TIMEOUT; + + etm_unlock(t); + + etm_writel(t, 0x440, ETMR_CTRL); + while (!(etm_readl(t, ETMR_CTRL) & ETMCTRL_PROGRAM) && --timeout) + ; + if (!timeout) { + dev_dbg(t->dev, "Waiting for progbit to assert timed out\n"); + etm_lock(t); + return -EFAULT; + } + + etm_lock(t); + + etb_unlock(t); + etb_writel(t, ETBFF_MANUAL_FLUSH, ETBR_FORMATTERCTRL); + + timeout = TRACER_TIMEOUT; + while (etb_readl(t, ETBR_FORMATTERCTRL) & + ETBFF_MANUAL_FLUSH && --timeout) + ; + if (!timeout) { + dev_dbg(t->dev, "Waiting for formatter flush to commence " + "timed out\n"); + etb_lock(t); + return -EFAULT; + } + + etb_writel(t, 0, ETBR_CTRL); + + etb_lock(t); + + t->flags &= ~TRACER_RUNNING; + + return 0; +} + +static int etb_getdatalen(struct tracectx *t) +{ + u32 v; + int rp, wp; + + v = etb_readl(t, ETBR_STATUS); + + if (v & 1) + return t->etb_bufsz; + + rp = etb_readl(t, ETBR_READADDR); + wp = etb_readl(t, ETBR_WRITEADDR); + + if (rp > wp) { + etb_writel(t, 0, ETBR_READADDR); + etb_writel(t, 0, ETBR_WRITEADDR); + + return 0; + } + + return wp - rp; +} + +/* sysrq+v will always stop the running trace and leave it at that */ +static void etm_dump(void) +{ + struct tracectx *t = &tracer; + u32 first = 0; + int length; + + if (!t->etb_regs) { + printk(KERN_INFO "No tracing hardware found\n"); + return; + } + + if (trace_isrunning(t)) + trace_stop(t); + + etb_unlock(t); + + length = etb_getdatalen(t); + + if (length == t->etb_bufsz) + first = etb_readl(t, ETBR_WRITEADDR); + + etb_writel(t, first, ETBR_READADDR); + + printk(KERN_INFO "Trace buffer contents length: %d\n", length); + printk(KERN_INFO "--- ETB buffer begin ---\n"); + for (; length; length--) + printk("%08x", cpu_to_be32(etb_readl(t, ETBR_READMEM))); + printk(KERN_INFO "\n--- ETB buffer end ---\n"); + + /* deassert the overflow bit */ + etb_writel(t, 1, ETBR_CTRL); + etb_writel(t, 0, ETBR_CTRL); + + etb_writel(t, 0, ETBR_TRIGGERCOUNT); + etb_writel(t, 0, ETBR_READADDR); + etb_writel(t, 0, ETBR_WRITEADDR); + + etb_lock(t); +} + +static void sysrq_etm_dump(int key, struct tty_struct *tty) +{ + dev_dbg(tracer.dev, "Dumping ETB buffer\n"); + etm_dump(); +} + +static struct sysrq_key_op sysrq_etm_op = { + .handler = sysrq_etm_dump, + .help_msg = "ETM buffer dump", + .action_msg = "etm", +}; + +static int etb_open(struct inode *inode, struct file *file) +{ + if (!tracer.etb_regs) + return -ENODEV; + + file->private_data = &tracer; + + return nonseekable_open(inode, file); +} + +static ssize_t etb_read(struct file *file, char __user *data, + size_t len, loff_t *ppos) +{ + int total, i; + long length; + struct tracectx *t = file->private_data; + u32 first = 0; + u32 *buf; + + mutex_lock(&t->mutex); + + if (trace_isrunning(t)) { + length = 0; + goto out; + } + + etb_unlock(t); + + total = etb_getdatalen(t); + if (total == t->etb_bufsz) + first = etb_readl(t, ETBR_WRITEADDR); + + etb_writel(t, first, ETBR_READADDR); + + length = min(total * 4, (int)len); + buf = vmalloc(length); + + dev_dbg(t->dev, "ETB buffer length: %d\n", total); + dev_dbg(t->dev, "ETB status reg: %x\n", etb_readl(t, ETBR_STATUS)); + for (i = 0; i < length / 4; i++) + buf[i] = etb_readl(t, ETBR_READMEM); + + /* the only way to deassert overflow bit in ETB status is this */ + etb_writel(t, 1, ETBR_CTRL); + etb_writel(t, 0, ETBR_CTRL); + + etb_writel(t, 0, ETBR_WRITEADDR); + etb_writel(t, 0, ETBR_READADDR); + etb_writel(t, 0, ETBR_TRIGGERCOUNT); + + etb_lock(t); + + length -= copy_to_user(data, buf, length); + vfree(buf); + +out: + mutex_unlock(&t->mutex); + + return length; +} + +static int etb_release(struct inode *inode, struct file *file) +{ + /* there's nothing to do here, actually */ + return 0; +} + +static const struct file_operations etb_fops = { + .owner = THIS_MODULE, + .read = etb_read, + .open = etb_open, + .release = etb_release, +}; + +static struct miscdevice etb_miscdev = { + .name = "tracebuf", + .minor = 0, + .fops = &etb_fops, +}; + +static int __init etb_probe(struct amba_device *dev, struct amba_id *id) +{ + struct tracectx *t = &tracer; + int ret = 0; + + ret = amba_request_regions(dev, NULL); + if (ret) + goto out; + + t->etb_regs = ioremap_nocache(dev->res.start, resource_size(&dev->res)); + if (!t->etb_regs) { + ret = -ENOMEM; + goto out_release; + } + + amba_set_drvdata(dev, t); + + etb_miscdev.parent = &dev->dev; + + ret = misc_register(&etb_miscdev); + if (ret) + goto out_unmap; + + t->emu_clk = clk_get(&dev->dev, "emu_src_ck"); + if (IS_ERR(t->emu_clk)) { + dev_dbg(&dev->dev, "Failed to obtain emu_src_ck.\n"); + return -EFAULT; + } + + clk_enable(t->emu_clk); + + etb_unlock(t); + t->etb_bufsz = etb_readl(t, ETBR_DEPTH); + dev_dbg(&dev->dev, "Size: %x\n", t->etb_bufsz); + + /* make sure trace capture is disabled */ + etb_writel(t, 0, ETBR_CTRL); + etb_writel(t, 0x1000, ETBR_FORMATTERCTRL); + etb_lock(t); + + dev_dbg(&dev->dev, "ETB AMBA driver initialized.\n"); + +out: + return ret; + +out_unmap: + amba_set_drvdata(dev, NULL); + iounmap(t->etb_regs); + +out_release: + amba_release_regions(dev); + + return ret; +} + +static int etb_remove(struct amba_device *dev) +{ + struct tracectx *t = amba_get_drvdata(dev); + + amba_set_drvdata(dev, NULL); + + iounmap(t->etb_regs); + t->etb_regs = NULL; + + clk_disable(t->emu_clk); + clk_put(t->emu_clk); + + amba_release_regions(dev); + + return 0; +} + +static struct amba_id etb_ids[] = { + { + .id = 0x0003b907, + .mask = 0x0007ffff, + }, + { 0, 0 }, +}; + +static struct amba_driver etb_driver = { + .drv = { + .name = "etb", + .owner = THIS_MODULE, + }, + .probe = etb_probe, + .remove = etb_remove, + .id_table = etb_ids, +}; + +/* use a sysfs file "trace_running" to start/stop tracing */ +static ssize_t trace_running_show(struct kobject *kobj, + struct kobj_attribute *attr, + char *buf) +{ + return sprintf(buf, "%x\n", trace_isrunning(&tracer)); +} + +static ssize_t trace_running_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t n) +{ + unsigned int value; + int ret; + + if (sscanf(buf, "%u", &value) != 1) + return -EINVAL; + + mutex_lock(&tracer.mutex); + ret = value ? trace_start(&tracer) : trace_stop(&tracer); + mutex_unlock(&tracer.mutex); + + return ret ? : n; +} + +static struct kobj_attribute trace_running_attr = + __ATTR(trace_running, 0644, trace_running_show, trace_running_store); + +static ssize_t trace_info_show(struct kobject *kobj, + struct kobj_attribute *attr, + char *buf) +{ + u32 etb_wa, etb_ra, etb_st, etb_fc, etm_ctrl, etm_st; + int datalen; + + etb_unlock(&tracer); + datalen = etb_getdatalen(&tracer); + etb_wa = etb_readl(&tracer, ETBR_WRITEADDR); + etb_ra = etb_readl(&tracer, ETBR_READADDR); + etb_st = etb_readl(&tracer, ETBR_STATUS); + etb_fc = etb_readl(&tracer, ETBR_FORMATTERCTRL); + etb_lock(&tracer); + + etm_unlock(&tracer); + etm_ctrl = etm_readl(&tracer, ETMR_CTRL); + etm_st = etm_readl(&tracer, ETMR_STATUS); + etm_lock(&tracer); + + return sprintf(buf, "Trace buffer len: %d\nComparator pairs: %d\n" + "ETBR_WRITEADDR:\t%08x\n" + "ETBR_READADDR:\t%08x\n" + "ETBR_STATUS:\t%08x\n" + "ETBR_FORMATTERCTRL:\t%08x\n" + "ETMR_CTRL:\t%08x\n" + "ETMR_STATUS:\t%08x\n", + datalen, + tracer.ncmppairs, + etb_wa, + etb_ra, + etb_st, + etb_fc, + etm_ctrl, + etm_st + ); +} + +static struct kobj_attribute trace_info_attr = + __ATTR(trace_info, 0444, trace_info_show, NULL); + +static ssize_t trace_mode_show(struct kobject *kobj, + struct kobj_attribute *attr, + char *buf) +{ + return sprintf(buf, "%d %d\n", + !!(tracer.flags & TRACER_CYCLE_ACC), + tracer.etm_portsz); +} + +static ssize_t trace_mode_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t n) +{ + unsigned int cycacc, portsz; + + if (sscanf(buf, "%u %u", &cycacc, &portsz) != 2) + return -EINVAL; + + mutex_lock(&tracer.mutex); + if (cycacc) + tracer.flags |= TRACER_CYCLE_ACC; + else + tracer.flags &= ~TRACER_CYCLE_ACC; + + tracer.etm_portsz = portsz & 0x0f; + mutex_unlock(&tracer.mutex); + + return n; +} + +static struct kobj_attribute trace_mode_attr = + __ATTR(trace_mode, 0644, trace_mode_show, trace_mode_store); + +static int __init etm_probe(struct amba_device *dev, struct amba_id *id) +{ + struct tracectx *t = &tracer; + int ret = 0; + + if (t->etm_regs) { + dev_dbg(&dev->dev, "ETM already initialized\n"); + ret = -EBUSY; + goto out; + } + + ret = amba_request_regions(dev, NULL); + if (ret) + goto out; + + t->etm_regs = ioremap_nocache(dev->res.start, resource_size(&dev->res)); + if (!t->etm_regs) { + ret = -ENOMEM; + goto out_release; + } + + amba_set_drvdata(dev, t); + + mutex_init(&t->mutex); + t->dev = &dev->dev; + t->flags = TRACER_CYCLE_ACC; + t->etm_portsz = 1; + + etm_unlock(t); + ret = etm_readl(t, CSCR_PRSR); + + t->ncmppairs = etm_readl(t, ETMR_CONFCODE) & 0xf; + etm_writel(t, 0x440, ETMR_CTRL); + etm_lock(t); + + ret = sysfs_create_file(&dev->dev.kobj, + &trace_running_attr.attr); + if (ret) + goto out_unmap; + + /* failing to create any of these two is not fatal */ + ret = sysfs_create_file(&dev->dev.kobj, &trace_info_attr.attr); + if (ret) + dev_dbg(&dev->dev, "Failed to create trace_info in sysfs\n"); + + ret = sysfs_create_file(&dev->dev.kobj, &trace_mode_attr.attr); + if (ret) + dev_dbg(&dev->dev, "Failed to create trace_mode in sysfs\n"); + + dev_dbg(t->dev, "ETM AMBA driver initialized.\n"); + +out: + return ret; + +out_unmap: + amba_set_drvdata(dev, NULL); + iounmap(t->etm_regs); + +out_release: + amba_release_regions(dev); + + return ret; +} + +static int etm_remove(struct amba_device *dev) +{ + struct tracectx *t = amba_get_drvdata(dev); + + amba_set_drvdata(dev, NULL); + + iounmap(t->etm_regs); + t->etm_regs = NULL; + + amba_release_regions(dev); + + sysfs_remove_file(&dev->dev.kobj, &trace_running_attr.attr); + sysfs_remove_file(&dev->dev.kobj, &trace_info_attr.attr); + sysfs_remove_file(&dev->dev.kobj, &trace_mode_attr.attr); + + return 0; +} + +static struct amba_id etm_ids[] = { + { + .id = 0x0003b921, + .mask = 0x0007ffff, + }, + { 0, 0 }, +}; + +static struct amba_driver etm_driver = { + .drv = { + .name = "etm", + .owner = THIS_MODULE, + }, + .probe = etm_probe, + .remove = etm_remove, + .id_table = etm_ids, +}; + +static int __init etm_init(void) +{ + int retval; + + retval = amba_driver_register(&etb_driver); + if (retval) { + printk(KERN_ERR "Failed to register etb\n"); + return retval; + } + + retval = amba_driver_register(&etm_driver); + if (retval) { + amba_driver_unregister(&etb_driver); + printk(KERN_ERR "Failed to probe etm\n"); + return retval; + } + + /* not being able to install this handler is not fatal */ + (void)register_sysrq_key('v', &sysrq_etm_op); + + return 0; +} + +device_initcall(etm_init); + diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 2fd88437348b..c71e39ed092f 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -163,6 +163,11 @@ config MACH_CPUAT91 Select this if you are using the Eukrea Electromatique's CPUAT91 board . +config MACH_ECO920 + bool "eco920" + help + Select this if you are using the eco920 board + endif # ---------------------------------------------------------- diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index ada440aab0c5..709fbad4a3ee 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -35,6 +35,7 @@ obj-$(CONFIG_MACH_PICOTUX2XX) += board-picotux200.o obj-$(CONFIG_MACH_ECBAT91) += board-ecbat91.o obj-$(CONFIG_MACH_YL9200) += board-yl-9200.o obj-$(CONFIG_MACH_CPUAT91) += board-cpuat91.o +obj-$(CONFIG_MACH_ECO920) += board-eco920.o # AT91SAM9260 board-specific support obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o @@ -77,6 +78,7 @@ obj-y += leds.o # Power Management obj-$(CONFIG_PM) += pm.o obj-$(CONFIG_AT91_SLOW_CLOCK) += pm_slowclock.o +obj-$(CONFIG_CPU_IDLE) += cpuidle.o ifeq ($(CONFIG_PM_DEBUG),y) CFLAGS_pm.o += -DDEBUG diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index 332b784050b2..a57af3e99c7c 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c @@ -130,6 +130,62 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data) {} #endif +/* -------------------------------------------------------------------- + * USB Host HS (EHCI) + * Needs an OHCI host for low and full speed management + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_EHCI_HCD_MODULE) +static u64 ehci_dmamask = DMA_BIT_MASK(32); +static struct at91_usbh_data usbh_ehci_data; + +static struct resource usbh_ehci_resources[] = { + [0] = { + .start = AT91SAM9G45_EHCI_BASE, + .end = AT91SAM9G45_EHCI_BASE + SZ_1M - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91SAM9G45_ID_UHPHS, + .end = AT91SAM9G45_ID_UHPHS, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91_usbh_ehci_device = { + .name = "atmel-ehci", + .id = -1, + .dev = { + .dma_mask = &ehci_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &usbh_ehci_data, + }, + .resource = usbh_ehci_resources, + .num_resources = ARRAY_SIZE(usbh_ehci_resources), +}; + +void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data) +{ + int i; + + if (!data) + return; + + /* Enable VBus control for UHP ports */ + for (i = 0; i < data->ports; i++) { + if (data->vbus_pin[i]) + at91_set_gpio_output(data->vbus_pin[i], 0); + } + + usbh_ehci_data = *data; + at91_clock_associate("uhphs_clk", &at91_usbh_ehci_device.dev, "ehci_clk"); + platform_device_register(&at91_usbh_ehci_device); +} +#else +void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data) {} +#endif + + /* -------------------------------------------------------------------- * USB HS Device (Gadget) * -------------------------------------------------------------------- */ diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c new file mode 100644 index 000000000000..295a96609e71 --- /dev/null +++ b/arch/arm/mach-at91/board-eco920.c @@ -0,0 +1,158 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include +#include +#include +#include + +#include + +#include +#include + +#include +#include +#include "generic.h" + +static void __init eco920_map_io(void) +{ + at91rm9200_initialize(18432000, AT91RM9200_PQFP); + + /* Setup the LEDs */ + at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1); + + /* DBGU on ttyS0. (Rx & Tx only */ + at91_register_uart(0, 0, 0); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); +} + +static void __init eco920_init_irq(void) +{ + at91rm9200_init_interrupts(NULL); +} + +static struct at91_eth_data __initdata eco920_eth_data = { + .phy_irq_pin = AT91_PIN_PC2, + .is_rmii = 1, +}; + +static struct at91_usbh_data __initdata eco920_usbh_data = { + .ports = 1, +}; + +static struct at91_udc_data __initdata eco920_udc_data = { + .vbus_pin = AT91_PIN_PB12, + .pullup_pin = AT91_PIN_PB13, +}; + +static struct at91_mmc_data __initdata eco920_mmc_data = { + .slot_b = 0, + .wire4 = 0, +}; + +static struct physmap_flash_data eco920_flash_data = { + .width = 2, +}; + +static struct resource eco920_flash_resource = { + .start = 0x11000000, + .end = 0x11ffffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device eco920_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &eco920_flash_data, + }, + .resource = &eco920_flash_resource, + .num_resources = 1, +}; + +static struct resource at91_beeper_resources[] = { + [0] = { + .start = AT91RM9200_BASE_TC3, + .end = AT91RM9200_BASE_TC3 + 0x39, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device at91_beeper = { + .name = "at91_beeper", + .id = 0, + .resource = at91_beeper_resources, + .num_resources = ARRAY_SIZE(at91_beeper_resources), +}; + +static struct spi_board_info eco920_spi_devices[] = { + { /* CAN controller */ + .modalias = "tlv5638", + .chip_select = 3, + .max_speed_hz = 20 * 1000 * 1000, + .mode = SPI_CPHA, + }, +}; + +static void __init eco920_board_init(void) +{ + at91_add_device_serial(); + at91_add_device_eth(&eco920_eth_data); + at91_add_device_usbh(&eco920_usbh_data); + at91_add_device_udc(&eco920_udc_data); + + at91_add_device_mmc(0, &eco920_mmc_data); + platform_device_register(&eco920_flash); + + at91_sys_write(AT91_SMC_CSR(7), AT91_SMC_RWHOLD_(1) + | AT91_SMC_RWSETUP_(1) + | AT91_SMC_DBW_8 + | AT91_SMC_WSEN + | AT91_SMC_NWS_(15)); + + at91_set_A_periph(AT91_PIN_PC6, 1); + + at91_set_gpio_input(AT91_PIN_PA23, 0); + at91_set_deglitch(AT91_PIN_PA23, 1); + +/* Initialization of the Static Memory Controller for Chip Select 3 */ + at91_sys_write(AT91_SMC_CSR(3), + AT91_SMC_DBW_16 | /* 16 bit */ + AT91_SMC_WSEN | + AT91_SMC_NWS_(5) | /* wait states */ + AT91_SMC_TDF_(1) /* float time */ + ); + + at91_clock_associate("tc3_clk", &at91_beeper.dev, "at91_beeper"); + at91_set_B_periph(AT91_PIN_PB6, 0); + platform_device_register(&at91_beeper); + + at91_add_device_spi(eco920_spi_devices, ARRAY_SIZE(eco920_spi_devices)); +} + +MACHINE_START(ECO920, "eco920") + /* Maintainer: Sascha Hauer */ + .phys_io = AT91_BASE_SYS, + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, + .boot_params = AT91_SDRAM_BASE + 0x100, + .timer = &at91rm9200_timer, + .map_io = eco920_map_io, + .init_irq = eco920_init_irq, + .init_machine = eco920_board_init, +MACHINE_END diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c index 64c3843f323d..1cf4d8681078 100644 --- a/arch/arm/mach-at91/board-sam9m10g45ek.c +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c @@ -366,6 +366,7 @@ static void __init ek_board_init(void) at91_add_device_serial(); /* USB HS Host */ at91_add_device_usbh_ohci(&ek_usbh_hs_data); + at91_add_device_usbh_ehci(&ek_usbh_hs_data); /* USB HS Device */ at91_add_device_usba(&ek_usba_udc_data); /* SPI */ diff --git a/arch/arm/mach-at91/cpuidle.c b/arch/arm/mach-at91/cpuidle.c new file mode 100644 index 000000000000..1cfeac1483d6 --- /dev/null +++ b/arch/arm/mach-at91/cpuidle.c @@ -0,0 +1,94 @@ +/* + * based on arch/arm/mach-kirkwood/cpuidle.c + * + * CPU idle support for AT91 SoC + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + * + * The cpu idle uses wait-for-interrupt and RAM self refresh in order + * to implement two idle states - + * #1 wait-for-interrupt + * #2 wait-for-interrupt and RAM self refresh + */ + +#include +#include +#include +#include +#include +#include + +#include "pm.h" + +#define AT91_MAX_STATES 2 + +static DEFINE_PER_CPU(struct cpuidle_device, at91_cpuidle_device); + +static struct cpuidle_driver at91_idle_driver = { + .name = "at91_idle", + .owner = THIS_MODULE, +}; + +/* Actual code that puts the SoC in different idle states */ +static int at91_enter_idle(struct cpuidle_device *dev, + struct cpuidle_state *state) +{ + struct timeval before, after; + int idle_time; + u32 saved_lpr; + + local_irq_disable(); + do_gettimeofday(&before); + if (state == &dev->states[0]) + /* Wait for interrupt state */ + cpu_do_idle(); + else if (state == &dev->states[1]) { + asm("b 1f; .align 5; 1:"); + asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */ + saved_lpr = sdram_selfrefresh_enable(); + cpu_do_idle(); + sdram_selfrefresh_disable(saved_lpr); + } + do_gettimeofday(&after); + local_irq_enable(); + idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC + + (after.tv_usec - before.tv_usec); + return idle_time; +} + +/* Initialize CPU idle by registering the idle states */ +static int at91_init_cpuidle(void) +{ + struct cpuidle_device *device; + + cpuidle_register_driver(&at91_idle_driver); + + device = &per_cpu(at91_cpuidle_device, smp_processor_id()); + device->state_count = AT91_MAX_STATES; + + /* Wait for interrupt state */ + device->states[0].enter = at91_enter_idle; + device->states[0].exit_latency = 1; + device->states[0].target_residency = 10000; + device->states[0].flags = CPUIDLE_FLAG_TIME_VALID; + strcpy(device->states[0].name, "WFI"); + strcpy(device->states[0].desc, "Wait for interrupt"); + + /* Wait for interrupt and RAM self refresh state */ + device->states[1].enter = at91_enter_idle; + device->states[1].exit_latency = 10; + device->states[1].target_residency = 10000; + device->states[1].flags = CPUIDLE_FLAG_TIME_VALID; + strcpy(device->states[1].name, "RAM_SR"); + strcpy(device->states[1].desc, "WFI and RAM Self Refresh"); + + if (cpuidle_register_device(device)) { + printk(KERN_ERR "at91_init_cpuidle: Failed registering\n"); + return -EIO; + } + return 0; +} + +device_initcall(at91_init_cpuidle); diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h index 2f4fcedc02ba..2295d80dd893 100644 --- a/arch/arm/mach-at91/include/mach/board.h +++ b/arch/arm/mach-at91/include/mach/board.h @@ -98,6 +98,7 @@ struct at91_usbh_data { }; extern void __init at91_add_device_usbh(struct at91_usbh_data *data); extern void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data); +extern void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data); /* NAND / SmartMedia */ struct atmel_nand_data { diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 4028724d490d..615668986480 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -29,62 +29,7 @@ #include #include "generic.h" - -#ifdef CONFIG_ARCH_AT91RM9200 -#include - -/* - * The AT91RM9200 goes into self-refresh mode with this command, and will - * terminate self-refresh automatically on the next SDRAM access. - */ -#define sdram_selfrefresh_enable() at91_sys_write(AT91_SDRAMC_SRR, 1) -#define sdram_selfrefresh_disable() do {} while (0) - -#elif defined(CONFIG_ARCH_AT91CAP9) -#include - -static u32 saved_lpr; - -static inline void sdram_selfrefresh_enable(void) -{ - u32 lpr; - - saved_lpr = at91_sys_read(AT91_DDRSDRC_LPR); - - lpr = saved_lpr & ~AT91_DDRSDRC_LPCB; - at91_sys_write(AT91_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH); -} - -#define sdram_selfrefresh_disable() at91_sys_write(AT91_DDRSDRC_LPR, saved_lpr) - -#else -#include - -#ifdef CONFIG_ARCH_AT91SAM9263 -/* - * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use; - * handle those cases both here and in the Suspend-To-RAM support. - */ -#define AT91_SDRAMC AT91_SDRAMC0 -#warning Assuming EB1 SDRAM controller is *NOT* used -#endif - -static u32 saved_lpr; - -static inline void sdram_selfrefresh_enable(void) -{ - u32 lpr; - - saved_lpr = at91_sys_read(AT91_SDRAMC_LPR); - - lpr = saved_lpr & ~AT91_SDRAMC_LPCB; - at91_sys_write(AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH); -} - -#define sdram_selfrefresh_disable() at91_sys_write(AT91_SDRAMC_LPR, saved_lpr) - -#endif - +#include "pm.h" /* * Show the reason for the previous system reset. @@ -260,6 +205,7 @@ extern u32 at91_slow_clock_sz; static int at91_pm_enter(suspend_state_t state) { + u32 saved_lpr; at91_gpio_suspend(); at91_irq_suspend(); @@ -315,9 +261,9 @@ static int at91_pm_enter(suspend_state_t state) */ asm("b 1f; .align 5; 1:"); asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */ - sdram_selfrefresh_enable(); + saved_lpr = sdram_selfrefresh_enable(); asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */ - sdram_selfrefresh_disable(); + sdram_selfrefresh_disable(saved_lpr); break; case PM_SUSPEND_ON: diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h new file mode 100644 index 000000000000..08322c44df1a --- /dev/null +++ b/arch/arm/mach-at91/pm.h @@ -0,0 +1,67 @@ +#ifdef CONFIG_ARCH_AT91RM9200 +#include + +/* + * The AT91RM9200 goes into self-refresh mode with this command, and will + * terminate self-refresh automatically on the next SDRAM access. + * + * Self-refresh mode is exited as soon as a memory access is made, but we don't + * know for sure when that happens. However, we need to restore the low-power + * mode if it was enabled before going idle. Restoring low-power mode while + * still in self-refresh is "not recommended", but seems to work. + */ + +static inline u32 sdram_selfrefresh_enable(void) +{ + u32 saved_lpr = at91_sys_read(AT91_SDRAMC_LPR); + + at91_sys_write(AT91_SDRAMC_LPR, 0); + at91_sys_write(AT91_SDRAMC_SRR, 1); + return saved_lpr; +} + +#define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_SDRAMC_LPR, saved_lpr) + +#elif defined(CONFIG_ARCH_AT91CAP9) +#include + + +static inline u32 sdram_selfrefresh_enable(void) +{ + u32 saved_lpr, lpr; + + saved_lpr = at91_sys_read(AT91_DDRSDRC_LPR); + + lpr = saved_lpr & ~AT91_DDRSDRC_LPCB; + at91_sys_write(AT91_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH); + return saved_lpr; +} + +#define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_DDRSDRC_LPR, saved_lpr) + +#else +#include + +#ifdef CONFIG_ARCH_AT91SAM9263 +/* + * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use; + * handle those cases both here and in the Suspend-To-RAM support. + */ +#define AT91_SDRAMC AT91_SDRAMC0 +#warning Assuming EB1 SDRAM controller is *NOT* used +#endif + +static inline u32 sdram_selfrefresh_enable(void) +{ + u32 saved_lpr, lpr; + + saved_lpr = at91_sys_read(AT91_SDRAMC_LPR); + + lpr = saved_lpr & ~AT91_SDRAMC_LPCB; + at91_sys_write(AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH); + return saved_lpr; +} + +#define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_SDRAMC_LPR, saved_lpr) + +#endif diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index b4357c388d2e..1f0d66561bbe 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c @@ -31,6 +31,7 @@ #include #include +#include #include #include @@ -728,6 +729,82 @@ void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data) platform_device_register(&ep93xx_fb_device); } + +/************************************************************************* + * EP93xx matrix keypad peripheral handling + *************************************************************************/ +static struct resource ep93xx_keypad_resource[] = { + { + .start = EP93XX_KEY_MATRIX_PHYS_BASE, + .end = EP93XX_KEY_MATRIX_PHYS_BASE + 0x0c - 1, + .flags = IORESOURCE_MEM, + }, { + .start = IRQ_EP93XX_KEY, + .end = IRQ_EP93XX_KEY, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device ep93xx_keypad_device = { + .name = "ep93xx-keypad", + .id = -1, + .num_resources = ARRAY_SIZE(ep93xx_keypad_resource), + .resource = ep93xx_keypad_resource, +}; + +void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data) +{ + ep93xx_keypad_device.dev.platform_data = data; + platform_device_register(&ep93xx_keypad_device); +} + +int ep93xx_keypad_acquire_gpio(struct platform_device *pdev) +{ + int err; + int i; + + for (i = 0; i < 8; i++) { + err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev)); + if (err) + goto fail_gpio_c; + err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev)); + if (err) + goto fail_gpio_d; + } + + /* Enable the keypad controller; GPIO ports C and D used for keypad */ + ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS | + EP93XX_SYSCON_DEVCFG_GONK); + + return 0; + +fail_gpio_d: + gpio_free(EP93XX_GPIO_LINE_C(i)); +fail_gpio_c: + for ( ; i >= 0; --i) { + gpio_free(EP93XX_GPIO_LINE_C(i)); + gpio_free(EP93XX_GPIO_LINE_D(i)); + } + return err; +} +EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio); + +void ep93xx_keypad_release_gpio(struct platform_device *pdev) +{ + int i; + + for (i = 0; i < 8; i++) { + gpio_free(EP93XX_GPIO_LINE_C(i)); + gpio_free(EP93XX_GPIO_LINE_D(i)); + } + + /* Disable the keypad controller; GPIO ports C and D used for GPIO */ + ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS | + EP93XX_SYSCON_DEVCFG_GONK); +} +EXPORT_SYMBOL(ep93xx_keypad_release_gpio); + + extern void ep93xx_gpio_init(void); void __init ep93xx_init_devices(void) diff --git a/arch/arm/mach-ep93xx/include/mach/clkdev.h b/arch/arm/mach-ep93xx/include/mach/clkdev.h index 04b37a89801c..50cb991eadeb 100644 --- a/arch/arm/mach-ep93xx/include/mach/clkdev.h +++ b/arch/arm/mach-ep93xx/include/mach/clkdev.h @@ -1,3 +1,7 @@ +/* + * arch/arm/mach-ep93xx/include/mach/clkdev.h + */ + #ifndef __ASM_MACH_CLKDEV_H #define __ASM_MACH_CLKDEV_H diff --git a/arch/arm/mach-ep93xx/include/mach/dma.h b/arch/arm/mach-ep93xx/include/mach/dma.h index ef6bd9d13148..3a5961d3f3b1 100644 --- a/arch/arm/mach-ep93xx/include/mach/dma.h +++ b/arch/arm/mach-ep93xx/include/mach/dma.h @@ -1,3 +1,7 @@ +/* + * arch/arm/mach-ep93xx/include/mach/dma.h + */ + #ifndef __ASM_ARCH_DMA_H #define __ASM_ARCH_DMA_H diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h index b1f937eda29c..d55194a4c093 100644 --- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h +++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h @@ -134,6 +134,7 @@ #define EP93XX_UART3_PHYS_BASE EP93XX_APB_PHYS(0x000e0000) #define EP93XX_UART3_BASE EP93XX_APB_IOMEM(0x000e0000) +#define EP93XX_KEY_MATRIX_PHYS_BASE EP93XX_APB_PHYS(0x000f0000) #define EP93XX_KEY_MATRIX_BASE EP93XX_APB_IOMEM(0x000f0000) #define EP93XX_ADC_BASE EP93XX_APB_IOMEM(0x00100000) diff --git a/arch/arm/mach-ep93xx/include/mach/hardware.h b/arch/arm/mach-ep93xx/include/mach/hardware.h index 349fa7cb72d5..5a3ce024b593 100644 --- a/arch/arm/mach-ep93xx/include/mach/hardware.h +++ b/arch/arm/mach-ep93xx/include/mach/hardware.h @@ -1,6 +1,7 @@ /* * arch/arm/mach-ep93xx/include/mach/hardware.h */ + #ifndef __ASM_ARCH_HARDWARE_H #define __ASM_ARCH_HARDWARE_H diff --git a/arch/arm/mach-ep93xx/include/mach/io.h b/arch/arm/mach-ep93xx/include/mach/io.h index cebcc1c53d63..594b77f21054 100644 --- a/arch/arm/mach-ep93xx/include/mach/io.h +++ b/arch/arm/mach-ep93xx/include/mach/io.h @@ -1,6 +1,7 @@ /* * arch/arm/mach-ep93xx/include/mach/io.h */ + #ifndef __ASM_MACH_IO_H #define __ASM_MACH_IO_H diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h index 469fd968d517..c6dc14dbca18 100644 --- a/arch/arm/mach-ep93xx/include/mach/platform.h +++ b/arch/arm/mach-ep93xx/include/mach/platform.h @@ -8,6 +8,7 @@ struct i2c_gpio_platform_data; struct i2c_board_info; struct platform_device; struct ep93xxfb_mach_info; +struct ep93xx_keypad_platform_data; struct ep93xx_eth_data { @@ -39,6 +40,9 @@ void ep93xx_register_fb(struct ep93xxfb_mach_info *data); void ep93xx_register_pwm(int pwm0, int pwm1); int ep93xx_pwm_acquire_gpio(struct platform_device *pdev); void ep93xx_pwm_release_gpio(struct platform_device *pdev); +void ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data); +int ep93xx_keypad_acquire_gpio(struct platform_device *pdev); +void ep93xx_keypad_release_gpio(struct platform_device *pdev); void ep93xx_init_devices(void); extern struct sys_timer ep93xx_timer; diff --git a/arch/arm/mach-nomadik/Kconfig b/arch/arm/mach-nomadik/Kconfig index 2a02b49c40f0..3c5e0f522e9c 100644 --- a/arch/arm/mach-nomadik/Kconfig +++ b/arch/arm/mach-nomadik/Kconfig @@ -5,13 +5,13 @@ menu "Nomadik boards" config MACH_NOMADIK_8815NHK bool "ST 8815 Nomadik Hardware Kit (evaluation board)" select NOMADIK_8815 + select HAS_MTU endmenu config NOMADIK_8815 bool - config I2C_BITBANG_8815NHK tristate "Driver for bit-bang busses found on the 8815 NHK" depends on I2C && MACH_NOMADIK_8815NHK diff --git a/arch/arm/mach-nomadik/Makefile b/arch/arm/mach-nomadik/Makefile index 412040982a40..36f67fb207d2 100644 --- a/arch/arm/mach-nomadik/Makefile +++ b/arch/arm/mach-nomadik/Makefile @@ -7,7 +7,7 @@ # Object file lists. -obj-y += clock.o timer.o gpio.o +obj-y += clock.o gpio.o # Cpu revision obj-$(CONFIG_NOMADIK_8815) += cpu-8815.o diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c index 6bfd537d5afb..116394484e71 100644 --- a/arch/arm/mach-nomadik/board-nhk8815.c +++ b/arch/arm/mach-nomadik/board-nhk8815.c @@ -25,11 +25,18 @@ #include #include #include + +#include + #include #include #include #include "clock.h" +/* Initial value for SRC control register: all timers use MXTAL/8 source */ +#define SRC_CR_INIT_MASK 0x00007fff +#define SRC_CR_INIT_VAL 0x2aaa8000 + /* These adresses span 16MB, so use three individual pages */ static struct resource nhk8815_nand_resources[] = { { @@ -239,6 +246,26 @@ static struct platform_device *nhk8815_platform_devices[] __initdata = { /* will add more devices */ }; +static void __init nomadik_timer_init(void) +{ + u32 src_cr; + + /* Configure timer sources in "system reset controller" ctrl reg */ + src_cr = readl(io_p2v(NOMADIK_SRC_BASE)); + src_cr &= SRC_CR_INIT_MASK; + src_cr |= SRC_CR_INIT_VAL; + writel(src_cr, io_p2v(NOMADIK_SRC_BASE)); + + /* Save global pointer to mtu, used by platform timer code */ + mtu_base = io_p2v(NOMADIK_MTU0_BASE); + + nmdk_timer_init(); +} + +static struct sys_timer nomadik_timer = { + .init = nomadik_timer_init, +}; + static void __init nhk8815_platform_init(void) { int i; diff --git a/arch/arm/mach-nomadik/include/mach/setup.h b/arch/arm/mach-nomadik/include/mach/setup.h index a4e468cf63da..b7897edf1f35 100644 --- a/arch/arm/mach-nomadik/include/mach/setup.h +++ b/arch/arm/mach-nomadik/include/mach/setup.h @@ -15,7 +15,7 @@ extern void cpu8815_map_io(void); extern void cpu8815_platform_init(void); extern void cpu8815_init_irq(void); -extern struct sys_timer nomadik_timer; +extern void nmdk_timer_init(void); #endif /* NOMADIK_8815 */ diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index aad194f61a33..6f1bbbc4d15f 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -100,3 +100,11 @@ config MACH_OMAP_ZOOM2 config MACH_OMAP_4430SDP bool "OMAP 4430 SDP board" depends on ARCH_OMAP4 + +config OMAP3_EMU + bool "OMAP3 debugging peripherals" + depends on ARCH_OMAP3 + select OC_ETM + help + Say Y here to enable debugging hardware of omap3 + diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 8cb16777661a..e141cabcfcce 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -44,6 +44,9 @@ obj-$(CONFIG_ARCH_OMAP4) += cm4xxx.o obj-$(CONFIG_ARCH_OMAP2) += clock24xx.o obj-$(CONFIG_ARCH_OMAP3) += clock34xx.o +# EMU peripherals +obj-$(CONFIG_OMAP3_EMU) += emu.o + iommu-y += iommu2.o iommu-$(CONFIG_ARCH_OMAP3) += omap3-iommu.o diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index 7c5c00df3c70..066e88a18824 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c @@ -119,7 +119,7 @@ static struct omap_clk omap34xx_clks[] = { CLK(NULL, "dpll3_m2x2_ck", &dpll3_m2x2_ck, CK_343X), CLK(NULL, "dpll3_m3_ck", &dpll3_m3_ck, CK_343X), CLK(NULL, "dpll3_m3x2_ck", &dpll3_m3x2_ck, CK_343X), - CLK(NULL, "emu_core_alwon_ck", &emu_core_alwon_ck, CK_343X), + CLK("etb", "emu_core_alwon_ck", &emu_core_alwon_ck, CK_343X), CLK(NULL, "dpll4_ck", &dpll4_ck, CK_343X), CLK(NULL, "dpll4_x2_ck", &dpll4_x2_ck, CK_343X), CLK(NULL, "omap_96m_alwon_fck", &omap_96m_alwon_fck, CK_343X), @@ -138,7 +138,7 @@ static struct omap_clk omap34xx_clks[] = { CLK(NULL, "dpll4_m5x2_ck", &dpll4_m5x2_ck, CK_343X), CLK(NULL, "dpll4_m6_ck", &dpll4_m6_ck, CK_343X), CLK(NULL, "dpll4_m6x2_ck", &dpll4_m6x2_ck, CK_343X), - CLK(NULL, "emu_per_alwon_ck", &emu_per_alwon_ck, CK_343X), + CLK("etb", "emu_per_alwon_ck", &emu_per_alwon_ck, CK_343X), CLK(NULL, "dpll5_ck", &dpll5_ck, CK_3430ES2), CLK(NULL, "dpll5_m2_ck", &dpll5_m2_ck, CK_3430ES2), CLK(NULL, "clkout2_src_ck", &clkout2_src_ck, CK_343X), @@ -147,7 +147,7 @@ static struct omap_clk omap34xx_clks[] = { CLK(NULL, "dpll1_fck", &dpll1_fck, CK_343X), CLK(NULL, "mpu_ck", &mpu_ck, CK_343X), CLK(NULL, "arm_fck", &arm_fck, CK_343X), - CLK(NULL, "emu_mpu_alwon_ck", &emu_mpu_alwon_ck, CK_343X), + CLK("etb", "emu_mpu_alwon_ck", &emu_mpu_alwon_ck, CK_343X), CLK(NULL, "dpll2_fck", &dpll2_fck, CK_343X), CLK(NULL, "iva2_ck", &iva2_ck, CK_343X), CLK(NULL, "l3_ick", &l3_ick, CK_343X), @@ -302,7 +302,7 @@ static struct omap_clk omap34xx_clks[] = { CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_343X), CLK("omap-mcbsp.3", "fck", &mcbsp3_fck, CK_343X), CLK("omap-mcbsp.4", "fck", &mcbsp4_fck, CK_343X), - CLK(NULL, "emu_src_ck", &emu_src_ck, CK_343X), + CLK("etb", "emu_src_ck", &emu_src_ck, CK_343X), CLK(NULL, "pclk_fck", &pclk_fck, CK_343X), CLK(NULL, "pclkx2_fck", &pclkx2_fck, CK_343X), CLK(NULL, "atclk_fck", &atclk_fck, CK_343X), diff --git a/arch/arm/mach-omap2/emu.c b/arch/arm/mach-omap2/emu.c new file mode 100644 index 000000000000..ec0d984a26fc --- /dev/null +++ b/arch/arm/mach-omap2/emu.c @@ -0,0 +1,66 @@ +/* + * emu.c + * + * ETM and ETB CoreSight components' resources as found in OMAP3xxx. + * + * Copyright (C) 2009 Nokia Corporation. + * Alexander Shishkin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Alexander Shishkin"); + +/* Cortex CoreSight components within omap3xxx EMU */ +#define ETM_BASE (L4_EMU_34XX_PHYS + 0x10000) +#define DBG_BASE (L4_EMU_34XX_PHYS + 0x11000) +#define ETB_BASE (L4_EMU_34XX_PHYS + 0x1b000) +#define DAPCTL (L4_EMU_34XX_PHYS + 0x1d000) + +static struct amba_device omap3_etb_device = { + .dev = { + .init_name = "etb", + }, + .res = { + .start = ETB_BASE, + .end = ETB_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .periphid = 0x000bb907, +}; + +static struct amba_device omap3_etm_device = { + .dev = { + .init_name = "etm", + }, + .res = { + .start = ETM_BASE, + .end = ETM_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .periphid = 0x102bb921, +}; + +static int __init emu_init(void) +{ + amba_device_register(&omap3_etb_device, &iomem_resource); + amba_device_register(&omap3_etm_device, &iomem_resource); + + return 0; +} + +subsys_initcall(emu_init); + diff --git a/arch/arm/mach-u300/Makefile b/arch/arm/mach-u300/Makefile index 885b5c027c1e..fab46fe9a71f 100644 --- a/arch/arm/mach-u300/Makefile +++ b/arch/arm/mach-u300/Makefile @@ -12,3 +12,4 @@ obj-$(CONFIG_MMC) += mmc.o obj-$(CONFIG_SPI_PL022) += spi.o obj-$(CONFIG_MACH_U300_SPIDUMMY) += dummyspichip.o obj-$(CONFIG_I2C_STU300) += i2c.o +obj-$(CONFIG_REGULATOR_AB3100) += regulator.o diff --git a/arch/arm/mach-u300/i2c.c b/arch/arm/mach-u300/i2c.c index 10be1f888b27..c73ed06b6065 100644 --- a/arch/arm/mach-u300/i2c.c +++ b/arch/arm/mach-u300/i2c.c @@ -9,13 +9,257 @@ */ #include #include +#include +#include +#include #include +/* + * Initial settings of ab3100 registers. + * Common for below LDO regulator settings are that + * bit 7-5 controls voltage. Bit 4 turns regulator ON(1) or OFF(0). + * Bit 3-2 controls sleep enable and bit 1-0 controls sleep mode. + */ + +/* LDO_A 0x16: 2.75V, ON, SLEEP_A, SLEEP OFF GND */ +#define LDO_A_SETTING 0x16 +/* LDO_C 0x10: 2.65V, ON, SLEEP_A or B, SLEEP full power */ +#define LDO_C_SETTING 0x10 +/* LDO_D 0x10: 2.65V, ON, sleep mode not used */ +#define LDO_D_SETTING 0x10 +/* LDO_E 0x10: 1.8V, ON, SLEEP_A or B, SLEEP full power */ +#define LDO_E_SETTING 0x10 +/* LDO_E SLEEP 0x00: 1.8V, not used, SLEEP_A or B, not used */ +#define LDO_E_SLEEP_SETTING 0x00 +/* LDO_F 0xD0: 2.5V, ON, SLEEP_A or B, SLEEP full power */ +#define LDO_F_SETTING 0xD0 +/* LDO_G 0x00: 2.85V, OFF, SLEEP_A or B, SLEEP full power */ +#define LDO_G_SETTING 0x00 +/* LDO_H 0x18: 2.75V, ON, SLEEP_B, SLEEP full power */ +#define LDO_H_SETTING 0x18 +/* LDO_K 0x00: 2.75V, OFF, SLEEP_A or B, SLEEP full power */ +#define LDO_K_SETTING 0x00 +/* LDO_EXT 0x00: Voltage not set, OFF, not used, not used */ +#define LDO_EXT_SETTING 0x00 +/* BUCK 0x7D: 1.2V, ON, SLEEP_A and B, SLEEP low power */ +#define BUCK_SETTING 0x7D +/* BUCK SLEEP 0xAC: 1.05V, Not used, SLEEP_A and B, Not used */ +#define BUCK_SLEEP_SETTING 0xAC + +static struct regulator_consumer_supply supply_ldo_c[] = { + { + .dev_name = "ab3100-codec", + .supply = "vaudio", /* Powers the codec */ + }, +}; + +/* + * This one needs to be a supply so we can turn it off + * in order to shut down the system. + */ +static struct regulator_consumer_supply supply_ldo_d[] = { + { + .dev = NULL, + .supply = "vana15", /* Powers the SoC (CPU etc) */ + }, +}; + +static struct regulator_consumer_supply supply_ldo_g[] = { + { + .dev_name = "mmci", + .supply = "vmmc", /* Powers MMC/SD card */ + }, +}; + +static struct regulator_consumer_supply supply_ldo_h[] = { + { + .dev_name = "xgam_pdi", + .supply = "vdisp", /* Powers camera, display etc */ + }, +}; + +static struct regulator_consumer_supply supply_ldo_k[] = { + { + .dev_name = "irda", + .supply = "vir", /* Power IrDA */ + }, +}; + +/* + * This is a placeholder for whoever wish to use the + * external power. + */ +static struct regulator_consumer_supply supply_ldo_ext[] = { + { + .dev = NULL, + .supply = "vext", /* External power */ + }, +}; + +/* Preset (hardware defined) voltages for these regulators */ +#define LDO_A_VOLTAGE 2750000 +#define LDO_C_VOLTAGE 2650000 +#define LDO_D_VOLTAGE 2650000 + +static struct ab3100_platform_data ab3100_plf_data = { + .reg_constraints = { + /* LDO A routing and constraints */ + { + .constraints = { + .name = "vrad", + .min_uV = LDO_A_VOLTAGE, + .max_uV = LDO_A_VOLTAGE, + .valid_modes_mask = REGULATOR_MODE_NORMAL, + .always_on = 1, + .boot_on = 1, + }, + }, + /* LDO C routing and constraints */ + { + .constraints = { + .min_uV = LDO_C_VOLTAGE, + .max_uV = LDO_C_VOLTAGE, + .valid_modes_mask = REGULATOR_MODE_NORMAL, + }, + .num_consumer_supplies = ARRAY_SIZE(supply_ldo_c), + .consumer_supplies = supply_ldo_c, + }, + /* LDO D routing and constraints */ + { + .constraints = { + .min_uV = LDO_D_VOLTAGE, + .max_uV = LDO_D_VOLTAGE, + .valid_modes_mask = REGULATOR_MODE_NORMAL, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + /* + * Actually this is boot_on but we need + * to reference count it externally to + * be able to shut down the system. + */ + }, + .num_consumer_supplies = ARRAY_SIZE(supply_ldo_d), + .consumer_supplies = supply_ldo_d, + }, + /* LDO E routing and constraints */ + { + .constraints = { + .name = "vio", + .min_uV = 1800000, + .max_uV = 1800000, + .valid_modes_mask = REGULATOR_MODE_NORMAL, + .valid_ops_mask = + REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_STATUS, + .always_on = 1, + .boot_on = 1, + }, + }, + /* LDO F routing and constraints */ + { + .constraints = { + .name = "vana25", + .min_uV = 2500000, + .max_uV = 2500000, + .valid_modes_mask = REGULATOR_MODE_NORMAL, + .valid_ops_mask = + REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_STATUS, + .always_on = 1, + .boot_on = 1, + }, + }, + /* LDO G routing and constraints */ + { + .constraints = { + .min_uV = 1500000, + .max_uV = 2850000, + .valid_modes_mask = REGULATOR_MODE_NORMAL, + .valid_ops_mask = + REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = ARRAY_SIZE(supply_ldo_g), + .consumer_supplies = supply_ldo_g, + }, + /* LDO H routing and constraints */ + { + .constraints = { + .min_uV = 1200000, + .max_uV = 2750000, + .valid_modes_mask = REGULATOR_MODE_NORMAL, + .valid_ops_mask = + REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = ARRAY_SIZE(supply_ldo_h), + .consumer_supplies = supply_ldo_h, + }, + /* LDO K routing and constraints */ + { + .constraints = { + .min_uV = 1800000, + .max_uV = 2750000, + .valid_modes_mask = REGULATOR_MODE_NORMAL, + .valid_ops_mask = + REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = ARRAY_SIZE(supply_ldo_k), + .consumer_supplies = supply_ldo_k, + }, + /* External regulator interface. No fixed voltage specified. + * If we knew the voltage of the external regulator and it + * was connected on the board, we could add the (fixed) + * voltage for it here. + */ + { + .constraints = { + .min_uV = 0, + .max_uV = 0, + .valid_modes_mask = REGULATOR_MODE_NORMAL, + .valid_ops_mask = + REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = ARRAY_SIZE(supply_ldo_ext), + .consumer_supplies = supply_ldo_ext, + }, + /* Buck converter routing and constraints */ + { + .constraints = { + .name = "vcore", + .min_uV = 1200000, + .max_uV = 1800000, + .valid_modes_mask = REGULATOR_MODE_NORMAL, + .valid_ops_mask = + REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_STATUS, + .always_on = 1, + .boot_on = 1, + }, + }, + }, + .reg_initvals = { + LDO_A_SETTING, + LDO_C_SETTING, + LDO_E_SETTING, + LDO_E_SLEEP_SETTING, + LDO_F_SETTING, + LDO_G_SETTING, + LDO_H_SETTING, + LDO_K_SETTING, + LDO_EXT_SETTING, + BUCK_SETTING, + BUCK_SLEEP_SETTING, + LDO_D_SETTING, + }, +}; + static struct i2c_board_info __initdata bus0_i2c_board_info[] = { { .type = "ab3100", .addr = 0x48, .irq = IRQ_U300_IRQ0_EXT, + .platform_data = &ab3100_plf_data, }, }; @@ -38,6 +282,11 @@ void __init u300_i2c_register_board_devices(void) { i2c_register_board_info(0, bus0_i2c_board_info, ARRAY_SIZE(bus0_i2c_board_info)); + /* + * This makes the core shut down all unused regulators + * after all the initcalls have completed. + */ + regulator_has_full_constraints(); i2c_register_board_info(1, bus1_i2c_board_info, ARRAY_SIZE(bus1_i2c_board_info)); } diff --git a/arch/arm/mach-u300/mmc.c b/arch/arm/mach-u300/mmc.c index 7b6b016786bb..109f5a6e71c7 100644 --- a/arch/arm/mach-u300/mmc.c +++ b/arch/arm/mach-u300/mmc.c @@ -40,64 +40,6 @@ static unsigned int mmc_status(struct device *dev) return mmci_card->mmc_inserted; } -/* - * Here follows a large chunk of code which will only be enabled if you - * have both the AB3100 chip mounted and the MMC subsystem activated. - */ - -static u32 mmc_translate_vdd(struct device *dev, unsigned int voltage) -{ - int v; - - /* - * MMC Spec: - * bit 7: 1.70 - 1.95V - * bit 8 - 14: 2.0 - 2.6V - * bit 15 - 23: 2.7 - 3.6V - * - * ab3100 voltages: - * 000 - 2.85V - * 001 - 2.75V - * 010 - 1.8V - * 011 - 1.5V - */ - switch (voltage) { - case 8: - v = 3; - break; - case 9: - case 10: - case 11: - case 12: - case 13: - case 14: - case 15: - v = 1; - break; - case 16: - v = 1; - break; - case 17: - case 18: - case 19: - case 20: - case 21: - case 22: - case 23: - case 24: - v = 0; - break; - default: - v = 0; - break; - } - - /* PL180 voltage register bits */ - return v << 2; -} - - - static int mmci_callback(void *data) { struct mmci_card_event *mmci_card = data; @@ -154,9 +96,11 @@ int __devinit mmc_init(struct amba_device *adev) if (!mmci_card) return -ENOMEM; + /* + * Do not set ocr_mask or voltage translation function, + * we have a regulator we can control instead. + */ /* Nominally 2.85V on our platform */ - mmci_card->mmc0_plat_data.ocr_mask = MMC_VDD_28_29; - mmci_card->mmc0_plat_data.translate_vdd = mmc_translate_vdd; mmci_card->mmc0_plat_data.status = mmc_status; mmci_card->mmc0_plat_data.gpio_wp = -1; mmci_card->mmc0_plat_data.gpio_cd = -1; diff --git a/arch/arm/mach-u300/regulator.c b/arch/arm/mach-u300/regulator.c new file mode 100644 index 000000000000..9c53f01c62eb --- /dev/null +++ b/arch/arm/mach-u300/regulator.c @@ -0,0 +1,88 @@ +/* + * arch/arm/mach-u300/regulator.c + * + * Copyright (C) 2009 ST-Ericsson AB + * License terms: GNU General Public License (GPL) version 2 + * Handle board-bound regulators and board power not related + * to any devices. + * Author: Linus Walleij + */ +#include +#include +#include +#include +/* Those are just for writing in syscon */ +#include +#include +#include + +/* + * Regulators that power the board and chip and which are + * not copuled to specific drivers are hogged in these + * instances. + */ +static struct regulator *main_power_15; + +/* + * This function is used from pm.h to shut down the system by + * resetting all regulators in turn and then disable regulator + * LDO D (main power). + */ +void u300_pm_poweroff(void) +{ + sigset_t old, all; + + sigfillset(&all); + if (!sigprocmask(SIG_BLOCK, &all, &old)) { + /* Disable LDO D to shut down the system */ + if (main_power_15) + regulator_disable(main_power_15); + else + pr_err("regulator not available to shut down system\n"); + (void) sigprocmask(SIG_SETMASK, &old, NULL); + } + return; +} + +/* + * Hog the regulators needed to power up the board. + */ +static int __init u300_init_boardpower(void) +{ + int err; + u32 val; + + pr_info("U300: setting up board power\n"); + main_power_15 = regulator_get(NULL, "vana15"); + if (IS_ERR(main_power_15)) { + pr_err("could not get vana15"); + return PTR_ERR(main_power_15); + } + err = regulator_enable(main_power_15); + if (err) { + pr_err("could not enable vana15\n"); + return err; + } + + /* + * On U300 a special system controller register pulls up the DC + * until the vana15 (LDO D) regulator comes up. At this point, all + * regulators are set and we do not need power control via + * DC ON anymore. This function will likely be moved whenever + * the rest of the U300 power management is implemented. + */ + pr_info("U300: disable system controller pull-up\n"); + val = readw(U300_SYSCON_VBASE + U300_SYSCON_PMCR); + val &= ~U300_SYSCON_PMCR_DCON_ENABLE; + writew(val, U300_SYSCON_VBASE + U300_SYSCON_PMCR); + + /* Register globally exported PM poweroff hook */ + pm_power_off = u300_pm_poweroff; + + return 0; +} + +/* + * So at module init time we hog the regulator! + */ +module_init(u300_init_boardpower); diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig new file mode 100644 index 000000000000..03625d744857 --- /dev/null +++ b/arch/arm/mach-ux500/Kconfig @@ -0,0 +1,15 @@ +menu "ST-Ericsson platform type" + depends on ARCH_U8500 + +comment "ST-Ericsson Multicore Mobile Platforms" + +config MACH_U8500_MOP + bool "U8500 Early Development platform" + default y + select ARM_GIC + select HAS_MTU + help + Include support for mop500 development platform + based on U8500 architecture. The platform is based + on early drop silicon version of 8500. +endmenu diff --git a/arch/arm/mach-ux500/Makefile b/arch/arm/mach-ux500/Makefile new file mode 100644 index 000000000000..95e6e24c0042 --- /dev/null +++ b/arch/arm/mach-ux500/Makefile @@ -0,0 +1,8 @@ +# +# Makefile for the linux kernel, U8500 machine. +# + +obj-y := clock.o +obj-$(CONFIG_ARCH_U8500) += cpu-u8500.o +obj-$(CONFIG_MACH_U8500_MOP) += board-mop500.o +obj-$(CONFIG_SMP) += platsmp.o headsmp.o localtimer.o diff --git a/arch/arm/mach-ux500/Makefile.boot b/arch/arm/mach-ux500/Makefile.boot new file mode 100644 index 000000000000..c7e75acfe6c9 --- /dev/null +++ b/arch/arm/mach-ux500/Makefile.boot @@ -0,0 +1,4 @@ + zreladdr-y := 0x00008000 +params_phys-y := 0x00000100 +initrd_phys-y := 0x00800000 + diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c new file mode 100644 index 000000000000..aa5afbcc90f9 --- /dev/null +++ b/arch/arm/mach-ux500/board-mop500.c @@ -0,0 +1,158 @@ +/* + * Copyright (C) 2008-2009 ST-Ericsson + * + * Author: Srinidhi KASAGAR + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2, as + * published by the Free Software Foundation. + * + */ +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include + +#include +#include + +#define __MEM_4K_RESOURCE(x) \ + .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM} + +/* These are active devices on this board */ +static struct amba_device uart0_device = { + .dev = { .init_name = "uart0" }, + __MEM_4K_RESOURCE(U8500_UART0_BASE), + .irq = {IRQ_UART0, NO_IRQ}, +}; + +static struct amba_device uart1_device = { + .dev = { .init_name = "uart1" }, + __MEM_4K_RESOURCE(U8500_UART1_BASE), + .irq = {IRQ_UART1, NO_IRQ}, +}; + +static struct amba_device uart2_device = { + .dev = { .init_name = "uart2" }, + __MEM_4K_RESOURCE(U8500_UART2_BASE), + .irq = {IRQ_UART2, NO_IRQ}, +}; + +static void ab4500_spi_cs_control(u32 command) +{ + /* set the FRM signal, which is CS - TODO */ +} + +struct pl022_config_chip ab4500_chip_info = { + .lbm = LOOPBACK_DISABLED, + .com_mode = INTERRUPT_TRANSFER, + .iface = SSP_INTERFACE_MOTOROLA_SPI, + /* we can act as master only */ + .hierarchy = SSP_MASTER, + .slave_tx_disable = 0, + .endian_rx = SSP_RX_MSB, + .endian_tx = SSP_TX_MSB, + .data_size = SSP_DATA_BITS_24, + .rx_lev_trig = SSP_RX_1_OR_MORE_ELEM, + .tx_lev_trig = SSP_TX_1_OR_MORE_EMPTY_LOC, + .clk_phase = SSP_CLK_SECOND_EDGE, + .clk_pol = SSP_CLK_POL_IDLE_HIGH, + .cs_control = ab4500_spi_cs_control, +}; + +static struct spi_board_info u8500_spi_devices[] = { + { + .modalias = "ab4500", + .controller_data = &ab4500_chip_info, + .max_speed_hz = 12000000, + .bus_num = 0, + .chip_select = 0, + .mode = SPI_MODE_0, + .irq = IRQ_AB4500, + }, +}; + +static struct pl022_ssp_controller ssp0_platform_data = { + .bus_id = 0, + /* pl022 not yet supports dma */ + .enable_dma = 0, + /* on this platform, gpio 31,142,144,214 & + * 224 are connected as chip selects + */ + .num_chipselect = 5, +}; + +static struct amba_device pl022_device = { + .dev = { + .coherent_dma_mask = ~0, + .init_name = "pl022", + .platform_data = &ssp0_platform_data, + }, + .res = { + .start = U8500_SSP0_BASE, + .end = U8500_SSP0_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .irq = {IRQ_SSP0, NO_IRQ }, + /* ST-Ericsson modified id */ + .periphid = SSP_PER_ID, +}; + +static struct amba_device *amba_devs[] __initdata = { + &uart0_device, + &uart1_device, + &uart2_device, + &pl022_device, +}; + +static void __init u8500_timer_init(void) +{ +#ifdef CONFIG_LOCAL_TIMERS + /* Setup the local timer base */ + twd_base = __io_address(U8500_TWD_BASE); +#endif + /* Setup the MTU base */ + mtu_base = __io_address(U8500_MTU0_BASE); + + nmdk_timer_init(); +} + +static struct sys_timer u8500_timer = { + .init = u8500_timer_init, +}; + +static void __init u8500_init_machine(void) +{ + int i; + + /* Register the active AMBA devices on this board */ + for (i = 0; i < ARRAY_SIZE(amba_devs); i++) + amba_device_register(amba_devs[i], &iomem_resource); + + spi_register_board_info(u8500_spi_devices, + ARRAY_SIZE(u8500_spi_devices)); + + u8500_init_devices(); +} + +MACHINE_START(U8500, "ST-Ericsson MOP500 platform") + /* Maintainer: Srinidhi Kasagar */ + .phys_io = U8500_UART2_BASE, + .io_pg_offst = (IO_ADDRESS(U8500_UART2_BASE) >> 18) & 0xfffc, + .boot_params = 0x100, + .map_io = u8500_map_io, + .init_irq = u8500_init_irq, + /* we re-use nomadik timer here */ + .timer = &u8500_timer, + .init_machine = u8500_init_machine, +MACHINE_END diff --git a/arch/arm/mach-ux500/clock.c b/arch/arm/mach-ux500/clock.c new file mode 100644 index 000000000000..20b6ebb6783a --- /dev/null +++ b/arch/arm/mach-ux500/clock.c @@ -0,0 +1,95 @@ +/* + * Copyright (C) 2009 ST-Ericsson + * heavily based on realview platform + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include +#include +#include +#include +#include +#include + +#include + +/* currently the clk structure + * just supports rate. This would + * be extended as and when new devices are + * added - TODO + */ +struct clk { + unsigned long rate; +}; + +int clk_enable(struct clk *clk) +{ + return 0; +} +EXPORT_SYMBOL(clk_enable); + +void clk_disable(struct clk *clk) +{ +} +EXPORT_SYMBOL(clk_disable); + +unsigned long clk_get_rate(struct clk *clk) +{ + return clk->rate; +} +EXPORT_SYMBOL(clk_get_rate); + +long clk_round_rate(struct clk *clk, unsigned long rate) +{ + /*TODO*/ + return rate; +} +EXPORT_SYMBOL(clk_round_rate); + +int clk_set_rate(struct clk *clk, unsigned long rate) +{ + clk->rate = rate; + return 0; +} +EXPORT_SYMBOL(clk_set_rate); + +/* ssp clock */ +static struct clk ssp_clk = { + .rate = 48000000, +}; + +/* fixed clock */ +static struct clk f38_clk = { + .rate = 38400000, +}; + +static struct clk_lookup lookups[] = { + { + /* UART0 */ + .dev_id = "uart0", + .clk = &f38_clk, + }, { /* UART1 */ + .dev_id = "uart1", + .clk = &f38_clk, + }, { /* UART2 */ + .dev_id = "uart2", + .clk = &f38_clk, + }, { /* SSP */ + .dev_id = "pl022", + .clk = &ssp_clk, + } +}; + +static int __init clk_init(void) +{ + int i; + + /* register the clock lookups */ + for (i = 0; i < ARRAY_SIZE(lookups); i++) + clkdev_add(&lookups[i]); + return 0; +} +arch_initcall(clk_init); diff --git a/arch/arm/mach-ux500/cpu-u8500.c b/arch/arm/mach-ux500/cpu-u8500.c new file mode 100644 index 000000000000..5f05e5850f71 --- /dev/null +++ b/arch/arm/mach-ux500/cpu-u8500.c @@ -0,0 +1,64 @@ +/* + * Copyright (C) 2008-2009 ST-Ericsson + * + * Author: Srinidhi KASAGAR + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2, as + * published by the Free Software Foundation. + * + */ +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +/* add any platform devices here - TODO */ +static struct platform_device *platform_devs[] __initdata = { + /* yet to be added, add i2c0, gpio.. */ +}; + +#define __IO_DEV_DESC(x, sz) { \ + .virtual = IO_ADDRESS(x), \ + .pfn = __phys_to_pfn(x), \ + .length = sz, \ + .type = MT_DEVICE, \ +} + +/* minimum static i/o mapping required to boot U8500 platforms */ +static struct map_desc u8500_io_desc[] __initdata = { + __IO_DEV_DESC(U8500_GIC_CPU_BASE, SZ_4K), + __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K), + __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K), + __IO_DEV_DESC(U8500_TWD_BASE, SZ_4K), + __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K), + __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K), +}; + +void __init u8500_map_io(void) +{ + iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc)); +} + +void __init u8500_init_irq(void) +{ + gic_dist_init(0, __io_address(U8500_GIC_DIST_BASE), 29); + gic_cpu_init(0, __io_address(U8500_GIC_CPU_BASE)); +} + +/* + * This function is called from the board init + */ +void __init u8500_init_devices(void) +{ + /* Register the platform devices */ + platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); + + return ; +} diff --git a/arch/arm/mach-ux500/headsmp.S b/arch/arm/mach-ux500/headsmp.S new file mode 100644 index 000000000000..a6be2cdf2b2f --- /dev/null +++ b/arch/arm/mach-ux500/headsmp.S @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2009 ST-Ericsson + * This file is based ARM Realview platform + * Copyright (c) 2003 ARM Limited + * All Rights Reserved + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include + + __INIT + +/* + * U8500 specific entry point for secondary CPUs. + */ +ENTRY(u8500_secondary_startup) + mrc p15, 0, r0, c0, c0, 5 + and r0, r0, #15 + adr r4, 1f + ldmia r4, {r5, r6} + sub r4, r4, r5 + add r6, r6, r4 + dsb +pen: ldr r7, [r6] + cmp r7, r0 + bne pen + + /* + * we've been released from the holding pen: secondary_stack + * should now contain the SVC stack for this core + */ + b secondary_startup + +1: .long . + .long pen_release diff --git a/arch/arm/mach-ux500/include/mach/clkdev.h b/arch/arm/mach-ux500/include/mach/clkdev.h new file mode 100644 index 000000000000..04b37a89801c --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/clkdev.h @@ -0,0 +1,7 @@ +#ifndef __ASM_MACH_CLKDEV_H +#define __ASM_MACH_CLKDEV_H + +#define __clk_get(clk) ({ 1; }) +#define __clk_put(clk) do { } while (0) + +#endif diff --git a/arch/arm/mach-ux500/include/mach/debug-macro.S b/arch/arm/mach-ux500/include/mach/debug-macro.S new file mode 100644 index 000000000000..8f21b6a95dce --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/debug-macro.S @@ -0,0 +1,19 @@ +/* + * Debugging macro include header + * + * Copyright (C) 2009 ST-Ericsson + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + .macro addruart,rx + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 @MMU enabled? + moveq \rx, #0x80000000 @MMU off, Physical address + movne \rx, #0xF0000000 @MMU on, Virtual address + orr \rx, \rx, #0x7000 + .endm + +#include diff --git a/arch/arm/mach-ux500/include/mach/entry-macro.S b/arch/arm/mach-ux500/include/mach/entry-macro.S new file mode 100644 index 000000000000..eece3301fef7 --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/entry-macro.S @@ -0,0 +1,89 @@ +/* + * Low-level IRQ helper macros for U8500 platforms + * + * Copyright (C) 2009 ST-Ericsson. + * + * This file is a copy of ARM Realview platform. + * -just satisfied checkpatch script. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ +#include +#include + + .macro disable_fiq + .endm + + .macro get_irqnr_preamble, base, tmp + ldr \base, =IO_ADDRESS(U8500_GIC_CPU_BASE) + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + + /* + * The interrupt numbering scheme is defined in the + * interrupt controller spec. To wit: + * + * Interrupts 0-15 are IPI + * 16-28 are reserved + * 29-31 are local. We allow 30 to be used for the watchdog. + * 32-1020 are global + * 1021-1022 are reserved + * 1023 is "spurious" (no interrupt) + * + * For now, we ignore all local interrupts so only return an + * interrupt if it's between 30 and 1020. The test_for_ipi + * routine below will pick up on IPIs. + * + * A simple read from the controller will tell us the number + * of the highest priority enabled interrupt. We then just + * need to check whether it is in the valid range for an + * IRQ (30-1020 inclusive). + */ + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + + /* bits 12-10 = src CPU, 9-0 = int # */ + ldr \irqstat, [\base, #GIC_CPU_INTACK] + + ldr \tmp, =1021 + + bic \irqnr, \irqstat, #0x1c00 + + cmp \irqnr, #29 + cmpcc \irqnr, \irqnr + cmpne \irqnr, \tmp + cmpcs \irqnr, \irqnr + + .endm + + /* We assume that irqstat (the raw value of the IRQ + * acknowledge register) is preserved from the macro above. + * If there is an IPI, we immediately signal end of + * interrupt on the controller, since this requires the + * original irqstat value which we won't easily be able + * to recreate later. + */ + + .macro test_for_ipi, irqnr, irqstat, base, tmp + bic \irqnr, \irqstat, #0x1c00 + cmp \irqnr, #16 + strcc \irqstat, [\base, #GIC_CPU_EOI] + cmpcs \irqnr, \irqnr + .endm + + /* As above, this assumes that irqstat and base + * are preserved.. + */ + + .macro test_for_ltirq, irqnr, irqstat, base, tmp + bic \irqnr, \irqstat, #0x1c00 + mov \tmp, #0 + cmp \irqnr, #29 + moveq \tmp, #1 + streq \irqstat, [\base, #GIC_CPU_EOI] + cmp \tmp, #0 + .endm diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h new file mode 100644 index 000000000000..6da650202dc7 --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/hardware.h @@ -0,0 +1,131 @@ +/* + * Copyright (C) 2009 ST-Ericsson. + * + * U8500 hardware definitions + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ +#ifndef __MACH_HARDWARE_H +#define __MACH_HARDWARE_H + +/* macros to get at IO space when running virtually + * We dont map all the peripherals, let ioremap do + * this for us. We map only very basic peripherals here. + */ +#define U8500_IO_VIRTUAL 0xf0000000 +#define U8500_IO_PHYSICAL 0xa0000000 + +/* this macro is used in assembly, so no cast */ +#define IO_ADDRESS(x) \ + (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + U8500_IO_VIRTUAL) + +/* typesafe io address */ +#define __io_address(n) __io(IO_ADDRESS(n)) + +/* + * Base address definitions for U8500 Onchip IPs. All the + * peripherals are contained in a single 1 Mbyte region, with + * AHB peripherals at the bottom and APB peripherals at the + * top of the region. PER stands for PERIPHERAL region which + * itself divided into sub regions. + */ +#define U8500_PER3_BASE 0x80000000 +#define U8500_PER2_BASE 0x80110000 +#define U8500_PER1_BASE 0x80120000 +#define U8500_PER4_BASE 0x80150000 + +#define U8500_PER6_BASE 0xa03c0000 +#define U8500_PER5_BASE 0xa03e0000 +#define U8500_PER7_BASE 0xa03d0000 + +#define U8500_SVA_BASE 0xa0100000 +#define U8500_SIA_BASE 0xa0200000 + +#define U8500_SGA_BASE 0xa0300000 +#define U8500_MCDE_BASE 0xa0350000 +#define U8500_DMA_BASE 0xa0362000 + +#define U8500_SCU_BASE 0xa0410000 +#define U8500_GIC_CPU_BASE 0xa0410100 +#define U8500_TWD_BASE 0xa0410600 +#define U8500_GIC_DIST_BASE 0xa0411000 +#define U8500_L2CC_BASE 0xa0412000 + +#define U8500_TWD_SIZE 0x100 + +/* per7 base addressess */ +#define U8500_CR_BASE (U8500_PER7_BASE + 0x8000) +#define U8500_MTU0_BASE (U8500_PER7_BASE + 0xa000) +#define U8500_MTU1_BASE (U8500_PER7_BASE + 0xb000) +#define U8500_TZPC0_BASE (U8500_PER7_BASE + 0xc000) +#define U8500_CLKRST7_BASE (U8500_PER7_BASE + 0xf000) + +/* per6 base addressess */ +#define U8500_RNG_BASE (U8500_PER6_BASE + 0x0000) +#define U8500_PKA_BASE (U8500_PER6_BASE + 0x1000) +#define U8500_PKAM_BASE (U8500_PER6_BASE + 0x2000) +#define U8500_CRYPTO0_BASE (U8500_PER6_BASE + 0xa000) +#define U8500_CRYPTO1_BASE (U8500_PER6_BASE + 0xb000) +#define U8500_CLKRST6_BASE (U8500_PER7_BASE + 0xf000) + +/* per5 base addressess */ +#define U8500_USBOTG_BASE (U8500_PER5_BASE + 0x00000) +#define U8500_GPIO5_BASE (U8500_PER5_BASE + 0x1e000) +#define U8500_CLKRST5_BASE (U8500_PER7_BASE + 0x1f000) + +/* per4 base addressess */ +#define U8500_BACKUPRAM0_BASE (U8500_PER4_BASE + 0x0000) +#define U8500_BACKUPRAM1_BASE (U8500_PER4_BASE + 0x1000) +#define U8500_RTT0_BASE (U8500_PER4_BASE + 0x2000) +#define U8500_RTT1_BASE (U8500_PER4_BASE + 0x3000) +#define U8500_RTC_BASE (U8500_PER4_BASE + 0x4000) +#define U8500_SCR_BASE (U8500_PER4_BASE + 0x5000) +#define U8500_DMC_BASE (U8500_PER4_BASE + 0x6000) +#define U8500_PRCMU_BASE (U8500_PER4_BASE + 0x7000) + +/* per3 base addressess */ +#define U8500_FSMC_BASE (U8500_PER3_BASE + 0x0000) +#define U8500_SSP0_BASE (U8500_PER3_BASE + 0x2000) +#define U8500_SSP1_BASE (U8500_PER3_BASE + 0x3000) +#define U8500_I2C0_BASE (U8500_PER3_BASE + 0x4000) +#define U8500_SDI2_BASE (U8500_PER3_BASE + 0x5000) +#define U8500_SKE_BASE (U8500_PER3_BASE + 0x6000) +#define U8500_UART2_BASE (U8500_PER3_BASE + 0x7000) +#define U8500_SDI5_BASE (U8500_PER3_BASE + 0x8000) +#define U8500_GPIO3_BASE (U8500_PER3_BASE + 0xe000) +#define U8500_CLKRST3_BASE (U8500_PER7_BASE + 0xf000) + +/* per2 base addressess */ +#define U8500_I2C3_BASE (U8500_PER2_BASE + 0x0000) +#define U8500_SPI2_BASE (U8500_PER2_BASE + 0x1000) +#define U8500_SPI1_BASE (U8500_PER2_BASE + 0x2000) +#define U8500_PWL_BASE (U8500_PER2_BASE + 0x3000) +#define U8500_SDI4_BASE (U8500_PER2_BASE + 0x4000) +#define U8500_MSP2_BASE (U8500_PER2_BASE + 0x7000) +#define U8500_SDI1_BASE (U8500_PER2_BASE + 0x8000) +#define U8500_SDI3_BASE (U8500_PER2_BASE + 0x9000) +#define U8500_SPI0_BASE (U8500_PER2_BASE + 0xa000) +#define U8500_HSIR_BASE (U8500_PER2_BASE + 0xb000) +#define U8500_HSIT_BASE (U8500_PER2_BASE + 0xc000) +#define U8500_GPIO2_BASE (U8500_PER2_BASE + 0xe000) +#define U8500_CLKRST2_BASE (U8500_PER2_BASE + 0xf000) + +/* per1 base addresses */ +#define U8500_UART0_BASE (U8500_PER1_BASE + 0x0000) +#define U8500_UART1_BASE (U8500_PER1_BASE + 0x1000) +#define U8500_I2C1_BASE (U8500_PER1_BASE + 0x2000) +#define U8500_MSP0_BASE (U8500_PER1_BASE + 0x3000) +#define U8500_MSP1_BASE (U8500_PER1_BASE + 0x4000) +#define U8500_SDI0_BASE (U8500_PER1_BASE + 0x6000) +#define U8500_I2C2_BASE (U8500_PER1_BASE + 0x8000) +#define U8500_SPI3_BASE (U8500_PER1_BASE + 0x9000) +#define U8500_SLIM0_BASE (U8500_PER1_BASE + 0xa000) +#define U8500_GPIO1_BASE (U8500_PER1_BASE + 0xe000) +#define U8500_CLKRST1_BASE (U8500_PER2_BASE + 0xf000) + +/* ST-Ericsson modified pl022 id */ +#define SSP_PER_ID 0x01080022 + +#endif /* __MACH_HARDWARE_H */ diff --git a/arch/arm/mach-ux500/include/mach/io.h b/arch/arm/mach-ux500/include/mach/io.h new file mode 100644 index 000000000000..1cf3f44ce5b2 --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/io.h @@ -0,0 +1,22 @@ +/* + * arch/arm/mach-u8500/include/mach/io.h + * + * Copyright (C) 1997-1999 Russell King + * + * Modifications: + * 06-12-1997 RMK Created. + * 07-04-1999 RMK Major cleanup + */ +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +#define IO_SPACE_LIMIT 0xffffffff + +/* + * We don't actually have real ISA nor PCI buses, but there is so many + * drivers out there that might just work if we fake them... + */ +#define __io(a) __typesafe_io(a) +#define __mem_pci(a) (a) + +#endif diff --git a/arch/arm/mach-ux500/include/mach/irqs.h b/arch/arm/mach-ux500/include/mach/irqs.h new file mode 100644 index 000000000000..394b5dd2200f --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/irqs.h @@ -0,0 +1,71 @@ +/* + * Copyright (C) 2008 STMicroelectronics + * Copyright (C) 2009 ST-Ericsson. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#ifndef ASM_ARCH_IRQS_H +#define ASM_ARCH_IRQS_H + +#include + +#define IRQ_LOCALTIMER 29 +#define IRQ_LOCALWDOG 30 + +/* Shared Peripheral Interrupt (SHPI) */ +#define IRQ_SHPI_START 32 + +/* Interrupt numbers generic for shared peripheral */ +#define IRQ_MTU0 (IRQ_SHPI_START + 4) +#define IRQ_SPI2 (IRQ_SHPI_START + 6) +#define IRQ_SPI0 (IRQ_SHPI_START + 8) +#define IRQ_UART0 (IRQ_SHPI_START + 11) +#define IRQ_I2C3 (IRQ_SHPI_START + 12) +#define IRQ_SSP0 (IRQ_SHPI_START + 14) +#define IRQ_MTU1 (IRQ_SHPI_START + 17) +#define IRQ_RTC_RTT (IRQ_SHPI_START + 18) +#define IRQ_UART1 (IRQ_SHPI_START + 19) +#define IRQ_I2C0 (IRQ_SHPI_START + 21) +#define IRQ_I2C1 (IRQ_SHPI_START + 22) +#define IRQ_USBOTG (IRQ_SHPI_START + 23) +#define IRQ_DMA (IRQ_SHPI_START + 25) +#define IRQ_UART2 (IRQ_SHPI_START + 26) +#define IRQ_HSIR_EXCEP (IRQ_SHPI_START + 29) +#define IRQ_MSP0 (IRQ_SHPI_START + 31) +#define IRQ_HSIR_CH0_OVRRUN (IRQ_SHPI_START + 32) +#define IRQ_HSIR_CH1_OVRRUN (IRQ_SHPI_START + 33) +#define IRQ_HSIR_CH2_OVRRUN (IRQ_SHPI_START + 34) +#define IRQ_HSIR_CH3_OVRRUN (IRQ_SHPI_START + 35) +#define IRQ_AB4500 (IRQ_SHPI_START + 40) +#define IRQ_DISP (IRQ_SHPI_START + 48) +#define IRQ_SiPI3 (IRQ_SHPI_START + 49) +#define IRQ_SSP1 (IRQ_SHPI_START + 52) +#define IRQ_I2C2 (IRQ_SHPI_START + 55) +#define IRQ_SDMMC0 (IRQ_SHPI_START + 60) +#define IRQ_MSP1 (IRQ_SHPI_START + 62) +#define IRQ_SPI1 (IRQ_SHPI_START + 96) +#define IRQ_MSP2 (IRQ_SHPI_START + 98) +#define IRQ_SDMMC4 (IRQ_SHPI_START + 99) +#define IRQ_HSIRD0 (IRQ_SHPI_START + 104) +#define IRQ_HSIRD1 (IRQ_SHPI_START + 105) +#define IRQ_HSITD0 (IRQ_SHPI_START + 106) +#define IRQ_HSITD1 (IRQ_SHPI_START + 107) +#define IRQ_GPIO0 (IRQ_SHPI_START + 119) +#define IRQ_GPIO1 (IRQ_SHPI_START + 120) +#define IRQ_GPIO2 (IRQ_SHPI_START + 121) +#define IRQ_GPIO3 (IRQ_SHPI_START + 122) +#define IRQ_GPIO4 (IRQ_SHPI_START + 123) +#define IRQ_GPIO5 (IRQ_SHPI_START + 124) +#define IRQ_GPIO6 (IRQ_SHPI_START + 125) +#define IRQ_GPIO7 (IRQ_SHPI_START + 126) +#define IRQ_GPIO8 (IRQ_SHPI_START + 127) + +/* There are 128 shared peripheral interrupts assigned to + * INTID[160:32]. The first 32 interrupts are reserved. + */ +#define NR_IRQS 161 + +#endif /*ASM_ARCH_IRQS_H*/ diff --git a/arch/arm/mach-ux500/include/mach/memory.h b/arch/arm/mach-ux500/include/mach/memory.h new file mode 100644 index 000000000000..510571a59e25 --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/memory.h @@ -0,0 +1,18 @@ +/* + * Copyright (C) 2009 ST-Ericsson + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +/* + * Physical DRAM offset. + */ +#define PHYS_OFFSET UL(0x00000000) +#define BUS_OFFSET UL(0x00000000) + +#endif diff --git a/arch/arm/mach-ux500/include/mach/setup.h b/arch/arm/mach-ux500/include/mach/setup.h new file mode 100644 index 000000000000..cf0ce1687f24 --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/setup.h @@ -0,0 +1,23 @@ +/* + * Copyright (C) 2009 ST-Ericsson. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * These symbols are needed for board-specific files to call their + * own cpu-specific files + */ +#ifndef __ASM_ARCH_SETUP_H +#define __ASM_ARCH_SETUP_H + +#include +#include + +extern void u8500_map_io(void); +extern void u8500_init_devices(void); +extern void u8500_init_irq(void); +/* We re-use nomadik_timer for this platform */ +extern void nmdk_timer_init(void); + +#endif /* __ASM_ARCH_SETUP_H */ diff --git a/arch/arm/mach-ux500/include/mach/smp.h b/arch/arm/mach-ux500/include/mach/smp.h new file mode 100644 index 000000000000..b59f7bc9725d --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/smp.h @@ -0,0 +1,32 @@ +/* + * This file is based ARM realview platform. + * Copyright (C) ARM Limited. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ +#ifndef ASMARM_ARCH_SMP_H +#define ASMARM_ARCH_SMP_H + +#include + +/* This is required to wakeup the secondary core */ +extern void u8500_secondary_startup(void); + +#define hard_smp_processor_id() \ + ({ \ + unsigned int cpunum; \ + __asm__("mrc p15, 0, %0, c0, c0, 5" \ + : "=r" (cpunum)); \ + cpunum &= 0x0F; \ + }) + +/* + * We use IRQ1 as the IPI + */ +static inline void smp_cross_call(const struct cpumask *mask) +{ + gic_raise_softirq(mask, 1); +} +#endif diff --git a/arch/arm/mach-ux500/include/mach/system.h b/arch/arm/mach-ux500/include/mach/system.h new file mode 100644 index 000000000000..c0cd8006f1a2 --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/system.h @@ -0,0 +1,25 @@ +/* + * Copyright (C) 2009 ST-Ericsson. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ + /* + * This should do all the clock switching + * and wait for interrupt tricks + */ + cpu_do_idle(); +} + +static inline void arch_reset(char mode, const char *cmd) +{ + /* yet to be implemented - TODO */ +} + +#endif diff --git a/arch/arm/mach-ux500/include/mach/timex.h b/arch/arm/mach-ux500/include/mach/timex.h new file mode 100644 index 000000000000..d0942c174018 --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/timex.h @@ -0,0 +1,6 @@ +#ifndef __ASM_ARCH_TIMEX_H +#define __ASM_ARCH_TIMEX_H + +#define CLOCK_TICK_RATE 110000000 + +#endif diff --git a/arch/arm/mach-ux500/include/mach/uncompress.h b/arch/arm/mach-ux500/include/mach/uncompress.h new file mode 100644 index 000000000000..8552eb188b50 --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/uncompress.h @@ -0,0 +1,58 @@ +/* + * Copyright (C) 2009 ST-Ericsson + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_UNCOMPRESS_H +#define __ASM_ARCH_UNCOMPRESS_H + +#include +#include +#include + +#define U8500_UART_DR 0x80007000 +#define U8500_UART_LCRH 0x8000702c +#define U8500_UART_CR 0x80007030 +#define U8500_UART_FR 0x80007018 + +static void putc(const char c) +{ + /* Do nothing if the UART is not enabled. */ + if (!(readb(U8500_UART_CR) & 0x1)) + return; + + if (c == '\n') + putc('\r'); + + while (readb(U8500_UART_FR) & (1 << 5)) + barrier(); + writeb(c, U8500_UART_DR); +} + +static void flush(void) +{ + if (!(readb(U8500_UART_CR) & 0x1)) + return; + while (readb(U8500_UART_FR) & (1 << 3)) + barrier(); +} + +static inline void arch_decomp_setup(void) +{ +} + +#define arch_decomp_wdog() /* nothing to do here */ + +#endif /* __ASM_ARCH_UNCOMPRESS_H */ diff --git a/arch/arm/mach-ux500/include/mach/vmalloc.h b/arch/arm/mach-ux500/include/mach/vmalloc.h new file mode 100644 index 000000000000..86cdbbce1842 --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/vmalloc.h @@ -0,0 +1,18 @@ +/* + * Copyright (C) 2009 ST-Ericsson + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#define VMALLOC_END 0xf0000000 diff --git a/arch/arm/mach-ux500/localtimer.c b/arch/arm/mach-ux500/localtimer.c new file mode 100644 index 000000000000..2288f6a7c518 --- /dev/null +++ b/arch/arm/mach-ux500/localtimer.c @@ -0,0 +1,28 @@ +/* + * Copyright (C) 2008-2009 ST-Ericsson + * Srinidhi Kasagar + * + * This file is heavily based on relaview platform, almost a copy. + * + * Copyright (C) 2002 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include +#include + +#include +#include +#include + +/* + * Setup the local clock events for a CPU. + */ +void __cpuinit local_timer_setup(struct clock_event_device *evt) +{ + evt->irq = IRQ_LOCALTIMER; + twd_timer_setup(evt); +} diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c new file mode 100644 index 000000000000..8dfe7ca245d8 --- /dev/null +++ b/arch/arm/mach-ux500/platsmp.c @@ -0,0 +1,177 @@ +/* + * Copyright (C) 2002 ARM Ltd. + * Copyright (C) 2008 STMicroelctronics. + * Copyright (C) 2009 ST-Ericsson. + * Author: Srinidhi Kasagar + * + * This file is based on arm realview platform + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +/* + * control for which core is the next to come out of the secondary + * boot "holding pen" + */ +volatile int __cpuinitdata pen_release = -1; + +static unsigned int __init get_core_count(void) +{ + return scu_get_core_count(__io_address(U8500_SCU_BASE)); +} + +static DEFINE_SPINLOCK(boot_lock); + +void __cpuinit platform_secondary_init(unsigned int cpu) +{ + trace_hardirqs_off(); + + /* + * if any interrupts are already enabled for the primary + * core (e.g. timer irq), then they will not have been enabled + * for us: do so + */ + gic_cpu_init(0, __io_address(U8500_GIC_CPU_BASE)); + + /* + * let the primary processor know we're out of the + * pen, then head off into the C entry point + */ + pen_release = -1; + + /* + * Synchronise with the boot thread. + */ + spin_lock(&boot_lock); + spin_unlock(&boot_lock); +} + +int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) +{ + unsigned long timeout; + + /* + * set synchronisation state between this boot processor + * and the secondary one + */ + spin_lock(&boot_lock); + + /* + * The secondary processor is waiting to be released from + * the holding pen - release it, then wait for it to flag + * that it has been released by resetting pen_release. + */ + pen_release = cpu; + flush_cache_all(); + + timeout = jiffies + (1 * HZ); + while (time_before(jiffies, timeout)) { + if (pen_release == -1) + break; + } + + /* + * now the secondary core is starting up let it run its + * calibrations, then wait for it to finish + */ + spin_unlock(&boot_lock); + + return pen_release != -1 ? -ENOSYS : 0; +} + +static void __init wakeup_secondary(void) +{ + /* nobody is to be released from the pen yet */ + pen_release = -1; + + /* + * write the address of secondary startup into the backup ram register + * at offset 0x1FF4, then write the magic number 0xA1FEED01 to the + * backup ram register at offset 0x1FF0, which is what boot rom code + * is waiting for. This would wake up the secondary core from WFE + */ +#define U8500_CPU1_JUMPADDR_OFFSET 0x1FF4 + __raw_writel(virt_to_phys(u8500_secondary_startup), + (void __iomem *)IO_ADDRESS(U8500_BACKUPRAM0_BASE) + + U8500_CPU1_JUMPADDR_OFFSET); + +#define U8500_CPU1_WAKEMAGIC_OFFSET 0x1FF0 + __raw_writel(0xA1FEED01, + (void __iomem *)IO_ADDRESS(U8500_BACKUPRAM0_BASE) + + U8500_CPU1_WAKEMAGIC_OFFSET); + + /* make sure write buffer is drained */ + mb(); +} + +/* + * Initialise the CPU possible map early - this describes the CPUs + * which may be present or become present in the system. + */ +void __init smp_init_cpus(void) +{ + unsigned int i, ncores = get_core_count(); + + for (i = 0; i < ncores; i++) + set_cpu_possible(i, true); +} + +void __init smp_prepare_cpus(unsigned int max_cpus) +{ + unsigned int ncores = get_core_count(); + unsigned int cpu = smp_processor_id(); + int i; + + /* sanity check */ + if (ncores == 0) { + printk(KERN_ERR + "U8500: strange CM count of 0? Default to 1\n"); + ncores = 1; + } + + if (ncores > num_possible_cpus()) { + printk(KERN_WARNING + "U8500: no. of cores (%d) greater than configured " + "maximum of %d - clipping\n", + ncores, num_possible_cpus()); + ncores = num_possible_cpus(); + } + + smp_store_cpu_info(cpu); + + /* + * are we trying to boot more cores than exist? + */ + if (max_cpus > ncores) + max_cpus = ncores; + + /* + * Initialise the present map, which describes the set of CPUs + * actually populated at the present time. + */ + for (i = 0; i < max_cpus; i++) + set_cpu_present(i, true); + + if (max_cpus > 1) { + /* + * Enable the local timer or broadcast device for the + * boot CPU, but only if we have more than one CPU. + */ + percpu_timer_setup(); + scu_enable(__io_address(U8500_SCU_BASE)); + wakeup_secondary(); + } +} diff --git a/arch/arm/mach-w90x900/dev.c b/arch/arm/mach-w90x900/dev.c index 2a6f98de48d2..51f17b753348 100644 --- a/arch/arm/mach-w90x900/dev.c +++ b/arch/arm/mach-w90x900/dev.c @@ -32,6 +32,7 @@ #include #include +#include #include #include "cpu.h" @@ -196,6 +197,18 @@ static struct platform_device nuc900_device_emc = { /* SPI device */ +static struct w90p910_spi_info nuc900_spiflash_data = { + .num_cs = 1, + .lsb = 0, + .txneg = 1, + .rxneg = 0, + .divider = 24, + .sleep = 0, + .txnum = 0, + .txbitlen = 1, + .bus_num = 0, +}; + static struct resource nuc900_spi_resource[] = { [0] = { .start = W90X900_PA_I2C + SPIOFFSET, @@ -214,6 +227,9 @@ static struct platform_device nuc900_device_spi = { .id = -1, .num_resources = ARRAY_SIZE(nuc900_spi_resource), .resource = nuc900_spi_resource, + .dev = { + .platform_data = &nuc900_spiflash_data, + } }; /* spi device, spi flash info */ diff --git a/arch/arm/plat-nomadik/Kconfig b/arch/arm/plat-nomadik/Kconfig new file mode 100644 index 000000000000..159daf583f85 --- /dev/null +++ b/arch/arm/plat-nomadik/Kconfig @@ -0,0 +1,22 @@ +# We keep common IP's here for Nomadik and other similar +# familiy of processors from ST-Ericsson. At the moment we have +# just MTU, others to follow soon. + +config PLAT_NOMADIK + bool + depends on ARCH_NOMADIK || ARCH_U8500 + default y + help + Common platform code for Nomadik and other ST-Ericsson + platforms. + +if PLAT_NOMADIK + +config HAS_MTU + bool + help + Support for Multi Timer Unit. MTU provides access + to multiple interrupt generating programmable + 32-bit free running decrementing counters. + +endif diff --git a/arch/arm/plat-nomadik/Makefile b/arch/arm/plat-nomadik/Makefile new file mode 100644 index 000000000000..37c7cdd0f8f0 --- /dev/null +++ b/arch/arm/plat-nomadik/Makefile @@ -0,0 +1,5 @@ +# arch/arm/plat-nomadik/Makefile +# Copyright 2009 ST-Ericsson +# Licensed under GPLv2 + +obj-$(CONFIG_HAS_MTU) += timer.o diff --git a/arch/arm/mach-nomadik/include/mach/mtu.h b/arch/arm/plat-nomadik/include/plat/mtu.h similarity index 90% rename from arch/arm/mach-nomadik/include/mach/mtu.h rename to arch/arm/plat-nomadik/include/plat/mtu.h index 76da7f085330..42c907258b14 100644 --- a/arch/arm/mach-nomadik/include/mach/mtu.h +++ b/arch/arm/plat-nomadik/include/plat/mtu.h @@ -1,5 +1,8 @@ -#ifndef __ASM_ARCH_MTU_H -#define __ASM_ARCH_MTU_H +#ifndef __PLAT_MTU_H +#define __PLAT_MTU_H + +/* should be set by the platform code */ +extern void __iomem *mtu_base; /* * The MTU device hosts four different counters, with 4 set of @@ -41,5 +44,5 @@ #define MTU_PCELL2 0xff8 #define MTU_PCELL3 0xffC -#endif /* __ASM_ARCH_MTU_H */ +#endif /* __PLAT_MTU_H */ diff --git a/arch/arm/mach-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c similarity index 81% rename from arch/arm/mach-nomadik/timer.c rename to arch/arm/plat-nomadik/timer.c index d1738e7061d4..62f18ad43a28 100644 --- a/arch/arm/mach-nomadik/timer.c +++ b/arch/arm/plat-nomadik/timer.c @@ -15,19 +15,14 @@ #include #include #include -#include -#define TIMER_CTRL 0x80 /* No divisor */ -#define TIMER_PERIODIC 0x40 -#define TIMER_SZ32BIT 0x02 - -/* Initial value for SRC control register: all timers use MXTAL/8 source */ -#define SRC_CR_INIT_MASK 0x00007fff -#define SRC_CR_INIT_VAL 0x2aaa8000 +#include static u32 nmdk_count; /* accumulated count */ static u32 nmdk_cycle; /* write-once */ -static __iomem void *mtu_base; + +/* setup by the platform code */ +void __iomem *mtu_base; /* * clocksource: the MTU device is a decrementing counters, so we negate @@ -93,7 +88,7 @@ static struct clock_event_device nmdk_clkevt = { static irqreturn_t nmdk_timer_interrupt(int irq, void *dev_id) { /* ack: "interrupt clear register" */ - writel( 1 << 0, mtu_base + MTU_ICR); + writel(1 << 0, mtu_base + MTU_ICR); /* we can't count lost ticks, unfortunately */ nmdk_count += nmdk_cycle; @@ -125,24 +120,14 @@ static void nmdk_timer_reset(void) writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(0)); } -static void __init nmdk_timer_init(void) +void __init nmdk_timer_init(void) { - u32 src_cr; unsigned long rate; int bits; rate = CLOCK_TICK_RATE; /* 2.4MHz */ nmdk_cycle = (rate + HZ/2) / HZ; - /* Configure timer sources in "system reset controller" ctrl reg */ - src_cr = readl(io_p2v(NOMADIK_SRC_BASE)); - src_cr &= SRC_CR_INIT_MASK; - src_cr |= SRC_CR_INIT_VAL; - writel(src_cr, io_p2v(NOMADIK_SRC_BASE)); - - /* Save global pointer to mtu, used by functions above */ - mtu_base = io_p2v(NOMADIK_MTU0_BASE); - /* Init the timer and register clocksource */ nmdk_timer_reset(); @@ -150,7 +135,9 @@ static void __init nmdk_timer_init(void) bits = 8*sizeof(nmdk_count); nmdk_clksrc.mask = CLOCKSOURCE_MASK(bits); - clocksource_register(&nmdk_clksrc); + if (clocksource_register(&nmdk_clksrc)) + printk(KERN_ERR "timer: failed to initialize clock " + "source %s\n", nmdk_clksrc.name); /* Register irq and clockevents */ setup_irq(IRQ_MTU0, &nmdk_timer_irq); @@ -158,7 +145,3 @@ static void __init nmdk_timer_init(void) nmdk_clkevt.cpumask = cpumask_of(0); clockevents_register_device(&nmdk_clkevt); } - -struct sys_timer nomadik_timer = { - .init = nmdk_timer_init, -}; diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index b401dadad4a8..eb140ff38c27 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -54,7 +54,7 @@ config DW_DMAC config AT_HDMAC tristate "Atmel AHB DMA support" - depends on ARCH_AT91SAM9RL + depends on ARCH_AT91SAM9RL || ARCH_AT91SAM9G45 select DMA_ENGINE help Support the Atmel AHB DMA controller. This can be integrated in