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rtc: imxdi: avoid the __raw* register access functions
Be independent of the endianness of the kernel. Signed-off-by: Juergen Borleis <jbe@pengutronix.de> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
This commit is contained in:
parent
a42e6eae45
commit
e30d31317b
1 changed files with 22 additions and 22 deletions
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@ -137,7 +137,7 @@ static void di_int_enable(struct imxdi_dev *imxdi, u32 intr)
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unsigned long flags;
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unsigned long flags;
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spin_lock_irqsave(&imxdi->irq_lock, flags);
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spin_lock_irqsave(&imxdi->irq_lock, flags);
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__raw_writel(__raw_readl(imxdi->ioaddr + DIER) | intr,
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writel(readl(imxdi->ioaddr + DIER) | intr,
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imxdi->ioaddr + DIER);
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imxdi->ioaddr + DIER);
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spin_unlock_irqrestore(&imxdi->irq_lock, flags);
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spin_unlock_irqrestore(&imxdi->irq_lock, flags);
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}
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}
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@ -150,7 +150,7 @@ static void di_int_disable(struct imxdi_dev *imxdi, u32 intr)
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unsigned long flags;
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unsigned long flags;
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spin_lock_irqsave(&imxdi->irq_lock, flags);
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spin_lock_irqsave(&imxdi->irq_lock, flags);
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__raw_writel(__raw_readl(imxdi->ioaddr + DIER) & ~intr,
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writel(readl(imxdi->ioaddr + DIER) & ~intr,
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imxdi->ioaddr + DIER);
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imxdi->ioaddr + DIER);
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spin_unlock_irqrestore(&imxdi->irq_lock, flags);
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spin_unlock_irqrestore(&imxdi->irq_lock, flags);
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}
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}
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@ -169,11 +169,11 @@ static void clear_write_error(struct imxdi_dev *imxdi)
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dev_warn(&imxdi->pdev->dev, "WARNING: Register write error!\n");
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dev_warn(&imxdi->pdev->dev, "WARNING: Register write error!\n");
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/* clear the write error flag */
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/* clear the write error flag */
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__raw_writel(DSR_WEF, imxdi->ioaddr + DSR);
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writel(DSR_WEF, imxdi->ioaddr + DSR);
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/* wait for it to take effect */
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/* wait for it to take effect */
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for (cnt = 0; cnt < 1000; cnt++) {
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for (cnt = 0; cnt < 1000; cnt++) {
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if ((__raw_readl(imxdi->ioaddr + DSR) & DSR_WEF) == 0)
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if ((readl(imxdi->ioaddr + DSR) & DSR_WEF) == 0)
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return;
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return;
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udelay(10);
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udelay(10);
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}
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}
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@ -201,7 +201,7 @@ static int di_write_wait(struct imxdi_dev *imxdi, u32 val, int reg)
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imxdi->dsr = 0;
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imxdi->dsr = 0;
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/* do the register write */
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/* do the register write */
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__raw_writel(val, imxdi->ioaddr + reg);
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writel(val, imxdi->ioaddr + reg);
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/* wait for the write to finish */
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/* wait for the write to finish */
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ret = wait_event_interruptible_timeout(imxdi->write_wait,
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ret = wait_event_interruptible_timeout(imxdi->write_wait,
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@ -235,7 +235,7 @@ static int dryice_rtc_read_time(struct device *dev, struct rtc_time *tm)
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struct imxdi_dev *imxdi = dev_get_drvdata(dev);
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struct imxdi_dev *imxdi = dev_get_drvdata(dev);
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unsigned long now;
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unsigned long now;
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now = __raw_readl(imxdi->ioaddr + DTCMR);
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now = readl(imxdi->ioaddr + DTCMR);
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rtc_time_to_tm(now, tm);
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rtc_time_to_tm(now, tm);
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return 0;
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return 0;
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@ -280,17 +280,17 @@ static int dryice_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
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struct imxdi_dev *imxdi = dev_get_drvdata(dev);
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struct imxdi_dev *imxdi = dev_get_drvdata(dev);
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u32 dcamr;
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u32 dcamr;
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dcamr = __raw_readl(imxdi->ioaddr + DCAMR);
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dcamr = readl(imxdi->ioaddr + DCAMR);
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rtc_time_to_tm(dcamr, &alarm->time);
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rtc_time_to_tm(dcamr, &alarm->time);
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/* alarm is enabled if the interrupt is enabled */
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/* alarm is enabled if the interrupt is enabled */
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alarm->enabled = (__raw_readl(imxdi->ioaddr + DIER) & DIER_CAIE) != 0;
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alarm->enabled = (readl(imxdi->ioaddr + DIER) & DIER_CAIE) != 0;
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/* don't allow the DSR read to mess up DSR_WCF */
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/* don't allow the DSR read to mess up DSR_WCF */
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mutex_lock(&imxdi->write_mutex);
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mutex_lock(&imxdi->write_mutex);
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/* alarm is pending if the alarm flag is set */
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/* alarm is pending if the alarm flag is set */
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alarm->pending = (__raw_readl(imxdi->ioaddr + DSR) & DSR_CAF) != 0;
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alarm->pending = (readl(imxdi->ioaddr + DSR) & DSR_CAF) != 0;
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mutex_unlock(&imxdi->write_mutex);
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mutex_unlock(&imxdi->write_mutex);
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@ -312,7 +312,7 @@ static int dryice_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
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return rc;
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return rc;
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/* don't allow setting alarm in the past */
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/* don't allow setting alarm in the past */
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now = __raw_readl(imxdi->ioaddr + DTCMR);
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now = readl(imxdi->ioaddr + DTCMR);
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if (alarm_time < now)
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if (alarm_time < now)
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return -EINVAL;
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return -EINVAL;
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@ -346,7 +346,7 @@ static irqreturn_t dryice_norm_irq(int irq, void *dev_id)
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u32 dsr, dier;
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u32 dsr, dier;
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irqreturn_t rc = IRQ_NONE;
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irqreturn_t rc = IRQ_NONE;
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dier = __raw_readl(imxdi->ioaddr + DIER);
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dier = readl(imxdi->ioaddr + DIER);
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/* handle write complete and write error cases */
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/* handle write complete and write error cases */
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if (dier & DIER_WCIE) {
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if (dier & DIER_WCIE) {
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@ -357,7 +357,7 @@ static irqreturn_t dryice_norm_irq(int irq, void *dev_id)
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return rc;
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return rc;
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/* DSR_WCF clears itself on DSR read */
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/* DSR_WCF clears itself on DSR read */
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dsr = __raw_readl(imxdi->ioaddr + DSR);
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dsr = readl(imxdi->ioaddr + DSR);
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if (dsr & (DSR_WCF | DSR_WEF)) {
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if (dsr & (DSR_WCF | DSR_WEF)) {
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/* mask the interrupt */
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/* mask the interrupt */
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di_int_disable(imxdi, DIER_WCIE);
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di_int_disable(imxdi, DIER_WCIE);
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@ -373,7 +373,7 @@ static irqreturn_t dryice_norm_irq(int irq, void *dev_id)
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/* handle the alarm case */
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/* handle the alarm case */
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if (dier & DIER_CAIE) {
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if (dier & DIER_CAIE) {
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/* DSR_WCF clears itself on DSR read */
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/* DSR_WCF clears itself on DSR read */
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dsr = __raw_readl(imxdi->ioaddr + DSR);
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dsr = readl(imxdi->ioaddr + DSR);
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if (dsr & DSR_CAF) {
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if (dsr & DSR_CAF) {
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/* mask the interrupt */
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/* mask the interrupt */
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di_int_disable(imxdi, DIER_CAIE);
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di_int_disable(imxdi, DIER_CAIE);
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@ -446,7 +446,7 @@ static int __init dryice_rtc_probe(struct platform_device *pdev)
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*/
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*/
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/* mask all interrupts */
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/* mask all interrupts */
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__raw_writel(0, imxdi->ioaddr + DIER);
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writel(0, imxdi->ioaddr + DIER);
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rc = devm_request_irq(&pdev->dev, imxdi->irq, dryice_norm_irq,
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rc = devm_request_irq(&pdev->dev, imxdi->irq, dryice_norm_irq,
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IRQF_SHARED, pdev->name, imxdi);
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IRQF_SHARED, pdev->name, imxdi);
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@ -456,7 +456,7 @@ static int __init dryice_rtc_probe(struct platform_device *pdev)
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}
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}
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/* put dryice into valid state */
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/* put dryice into valid state */
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if (__raw_readl(imxdi->ioaddr + DSR) & DSR_NVF) {
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if (readl(imxdi->ioaddr + DSR) & DSR_NVF) {
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rc = di_write_wait(imxdi, DSR_NVF | DSR_SVF, DSR);
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rc = di_write_wait(imxdi, DSR_NVF | DSR_SVF, DSR);
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if (rc)
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if (rc)
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goto err;
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goto err;
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@ -471,23 +471,23 @@ static int __init dryice_rtc_probe(struct platform_device *pdev)
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goto err;
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goto err;
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/* clear alarm flag */
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/* clear alarm flag */
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if (__raw_readl(imxdi->ioaddr + DSR) & DSR_CAF) {
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if (readl(imxdi->ioaddr + DSR) & DSR_CAF) {
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rc = di_write_wait(imxdi, DSR_CAF, DSR);
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rc = di_write_wait(imxdi, DSR_CAF, DSR);
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if (rc)
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if (rc)
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goto err;
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goto err;
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}
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}
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/* the timer won't count if it has never been written to */
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/* the timer won't count if it has never been written to */
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if (__raw_readl(imxdi->ioaddr + DTCMR) == 0) {
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if (readl(imxdi->ioaddr + DTCMR) == 0) {
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rc = di_write_wait(imxdi, 0, DTCMR);
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rc = di_write_wait(imxdi, 0, DTCMR);
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if (rc)
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if (rc)
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goto err;
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goto err;
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}
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}
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/* start keeping time */
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/* start keeping time */
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if (!(__raw_readl(imxdi->ioaddr + DCR) & DCR_TCE)) {
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if (!(readl(imxdi->ioaddr + DCR) & DCR_TCE)) {
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rc = di_write_wait(imxdi,
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rc = di_write_wait(imxdi,
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__raw_readl(imxdi->ioaddr + DCR) | DCR_TCE,
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readl(imxdi->ioaddr + DCR) | DCR_TCE,
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DCR);
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DCR);
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if (rc)
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if (rc)
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goto err;
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goto err;
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@ -516,7 +516,7 @@ static int __exit dryice_rtc_remove(struct platform_device *pdev)
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flush_work(&imxdi->work);
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flush_work(&imxdi->work);
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/* mask all interrupts */
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/* mask all interrupts */
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__raw_writel(0, imxdi->ioaddr + DIER);
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writel(0, imxdi->ioaddr + DIER);
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clk_disable_unprepare(imxdi->clk);
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clk_disable_unprepare(imxdi->clk);
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