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drm/amd/powerplay: Configuring DIDT blocks only SQ enabled on Polaris11.
following firmware's request. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1 changed files with 12 additions and 9 deletions
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@ -767,16 +767,9 @@ int phm_get_voltage_evv_on_sclk(struct pp_hwmgr *hwmgr, uint8_t voltage_type,
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int polaris_set_asic_special_caps(struct pp_hwmgr *hwmgr)
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{
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/* power tune caps Assume disabled */
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_SQRamping);
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_DBRamping);
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TDRamping);
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TCPRamping);
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_RegulatorHot);
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@ -786,9 +779,19 @@ int polaris_set_asic_special_caps(struct pp_hwmgr *hwmgr)
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TablelessHardwareInterface);
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if ((hwmgr->chip_id == CHIP_POLARIS11) || (hwmgr->chip_id == CHIP_POLARIS12))
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if (hwmgr->chip_id != CHIP_POLARIS10)
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_SPLLShutdownSupport);
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if (hwmgr->chip_id != CHIP_POLARIS11) {
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_DBRamping);
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TDRamping);
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TCPRamping);
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}
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return 0;
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}
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