dt-bindings: bus: Convert ACONNECT doc to json-schema

Move ACONNECT documentation to YAML format.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Sameer Pujar 2020-11-06 21:13:33 +05:30 committed by Thierry Reding
parent d806cdaea1
commit e36f938142
2 changed files with 82 additions and 44 deletions

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NVIDIA Tegra ACONNECT Bus
The Tegra ACONNECT bus is an AXI switch which is used to connnect various
components inside the Audio Processing Engine (APE). All CPU accesses to
the APE subsystem go through the ACONNECT via an APB to AXI wrapper.
Required properties:
- compatible: Must be "nvidia,tegra210-aconnect".
- clocks: Must contain the entries for the APE clock (TEGRA210_CLK_APE),
and APE interface clock (TEGRA210_CLK_APB2APE).
- clock-names: Must contain the names "ape" and "apb2ape" for the corresponding
'clocks' entries.
- power-domains: Must contain a phandle that points to the audio powergate
(namely 'aud') for Tegra210.
- #address-cells: The number of cells used to represent physical base addresses
in the aconnect address space. Should be 1.
- #size-cells: The number of cells used to represent the size of an address
range in the aconnect address space. Should be 1.
- ranges: Mapping of the aconnect address space to the CPU address space.
All devices accessed via the ACONNNECT are described by child-nodes.
Example:
aconnect@702c0000 {
compatible = "nvidia,tegra210-aconnect";
clocks = <&tegra_car TEGRA210_CLK_APE>,
<&tegra_car TEGRA210_CLK_APB2APE>;
clock-names = "ape", "apb2ape";
power-domains = <&pd_audio>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x702c0000 0x0 0x702c0000 0x00040000>;
child1 {
...
};
child2 {
...
};
};

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/bus/nvidia,tegra210-aconnect.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NVIDIA Tegra ACONNECT Bus
description: |
The Tegra ACONNECT bus is an AXI switch which is used to connnect various
components inside the Audio Processing Engine (APE). All CPU accesses to
the APE subsystem go through the ACONNECT via an APB to AXI wrapper. All
devices accessed via the ACONNNECT are described by child-nodes.
maintainers:
- Jon Hunter <jonathanh@nvidia.com>
properties:
compatible:
oneOf:
- const: nvidia,tegra210-aconnect
- items:
- enum:
- nvidia,tegra186-aconnect
- nvidia,tegra194-aconnect
- const: nvidia,tegra210-aconnect
clocks:
items:
- description: Must contain the entry for APE clock
- description: Must contain the entry for APE interface clock
clock-names:
items:
- const: ape
- const: apb2ape
power-domains:
maxItems: 1
"#address-cells":
const: 1
"#size-cells":
const: 1
ranges: true
patternProperties:
"@[0-9a-f]+$":
type: object
required:
- compatible
- clocks
- clock-names
- power-domains
- "#address-cells"
- "#size-cells"
- ranges
additionalProperties: false
examples:
- |
#include<dt-bindings/clock/tegra210-car.h>
aconnect@702c0000 {
compatible = "nvidia,tegra210-aconnect";
clocks = <&tegra_car TEGRA210_CLK_APE>,
<&tegra_car TEGRA210_CLK_APB2APE>;
clock-names = "ape", "apb2ape";
power-domains = <&pd_audio>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x702c0000 0x702c0000 0x00040000>;
// Child device nodes follow ...
};
...