mirrors/linux-stable
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git synced 2024-09-28 21:33:52 +00:00
Code Issues Releases Wiki Activity

tty: serial: uartps: Add support for uartps controller reset

Browse source 
Add support for an optional reset for the uartps controller using
the reset driver. If the uartps node contains the "resets" property,
then cdns_uart_startup performs uartps controller non-pulse out of reset
and reset in exit path.

Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com>
Link: https://lore.kernel.org/r/20240425062358.1347684-4-manikanta.guntupalli@amd.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Manikanta Guntupalli 2024-04-25 11:53:58 +05:30 committed by Greg Kroah-Hartman
parent b433768501
commit e3896be240
1 changed files with 15 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

15
drivers/tty/serial/xilinx_uartps.c
View file

@ -25,6 +25,7 @@
#include <linux/gpio.h>
#include <linux/gpio/consumer.h>
#include <linux/delay.h>
#include <linux/reset.h>
#define CDNS_UART_TTY_NAME "ttyPS"
#define CDNS_UART_NAME "xuartps"
@ -198,6 +199,7 @@ MODULE_PARM_DESC(rx_timeout, "Rx timeout, 1-255");
* @gpiod_rts: Pointer to the gpio descriptor
* @rs485_tx_started: RS485 tx state
* @tx_timer: Timer for tx
* @rstc: Pointer to the reset control
*/
struct cdns_uart {
struct uart_port *port;
@ -211,6 +213,7 @@ struct cdns_uart {
struct gpio_desc *gpiod_rts;
bool rs485_tx_started;
struct hrtimer tx_timer;
struct reset_control *rstc;
};
struct cdns_platform_data {
u32 quirks;
@ -948,6 +951,10 @@ static int cdns_uart_startup(struct uart_port *port)
is_brk_support = cdns_uart->quirks & CDNS_UART_RXBS_SUPPORT;
ret = reset_control_deassert(cdns_uart->rstc);
if (ret)
return ret;
uart_port_lock_irqsave(port, &flags);
/* Disable the TX and RX */
@ -1721,6 +1728,13 @@ static int cdns_uart_probe(struct platform_device *pdev)
dev_err(&pdev->dev, "clock name 'ref_clk' is deprecated.\n");
}
cdns_uart_data->rstc = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
if (IS_ERR(cdns_uart_data->rstc)) {
rc = PTR_ERR(cdns_uart_data->rstc);
dev_err_probe(&pdev->dev, rc, "Cannot get UART reset\n");
goto err_out_unregister_driver;
}
rc = clk_prepare_enable(cdns_uart_data->pclk);
if (rc) {
dev_err(&pdev->dev, "Unable to enable pclk clock.\n");
@ -1881,6 +1895,7 @@ static void cdns_uart_remove(struct platform_device *pdev)
if (console_port == port)
console_port = NULL;
#endif
reset_control_assert(cdns_uart_data->rstc);
if (!--instances)
uart_unregister_driver(cdns_uart_data->cdns_uart_driver);