mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-21 08:19:28 +00:00
i2c: designware: Cleaning and comment style fixes.
The purpose of this commit is to fix some comments and styling in the existing code due to the need of reuse this code. What is being made here is: - Sorted the headers files - Corrected some comments style (capital letters, lowcase i2c) - Reverse tree in the variables declaration - Add/remove empty lines and tabs where needed - Fix of misspelled word "endianness" and "transferred" - Replaced the return variable "r" with the more standard "ret" The value of this, besides the rules of coding style, is because I will use this code after and it will make my future patch a lot bigger and complicated to review. The work here won't bring any additional work to backported fixes because is just style and reordering. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
This commit is contained in:
parent
f27e7805ba
commit
e393f674c5
3 changed files with 62 additions and 61 deletions
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@ -21,17 +21,17 @@
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* ----------------------------------------------------------------------------
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*
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*/
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#include <linux/delay.h>
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#include <linux/export.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/i2c.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/pm_runtime.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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#include "i2c-designware-core.h"
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#include <linux/pm_runtime.h>
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#include "i2c-designware-core.h"
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/*
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* Registers offset
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*/
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@ -98,7 +98,7 @@
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#define DW_IC_ERR_TX_ABRT 0x1
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#define DW_IC_TAR_10BITADDR_MASTER BIT(12)
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#define DW_IC_TAR_10BITADDR_MASTER BIT(12)
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#define DW_IC_COMP_PARAM_1_SPEED_MODE_HIGH (BIT(2) | BIT(3))
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#define DW_IC_COMP_PARAM_1_SPEED_MODE_MASK GENMASK(3, 2)
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@ -113,10 +113,10 @@
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#define TIMEOUT 20 /* ms */
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/*
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* hardware abort codes from the DW_IC_TX_ABRT_SOURCE register
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* Hardware abort codes from the DW_IC_TX_ABRT_SOURCE register
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*
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* only expected abort codes are listed here
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* refer to the datasheet for the full list
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* Only expected abort codes are listed here,
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* refer to the datasheet for the full list.
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*/
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#define ABRT_7B_ADDR_NOACK 0
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#define ABRT_10ADDR1_NOACK 1
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@ -318,7 +318,7 @@ static void i2c_dw_release_lock(struct dw_i2c_dev *dev)
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}
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/**
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* i2c_dw_init() - initialize the designware i2c master hardware
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* i2c_dw_init() - Initialize the designware I2C master hardware
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* @dev: device private data
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*
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* This functions configures and enables the I2C master.
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@ -344,8 +344,8 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
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/* Configure register access mode 16bit */
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dev->flags |= ACCESS_16BIT;
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} else if (reg != DW_IC_COMP_TYPE_VALUE) {
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dev_err(dev->dev, "Unknown Synopsys component type: "
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"0x%08x\n", reg);
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dev_err(dev->dev,
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"Unknown Synopsys component type: 0x%08x\n", reg);
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i2c_dw_release_lock(dev);
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return -ENODEV;
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}
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@ -355,7 +355,7 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
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/* Disable the adapter */
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__i2c_dw_enable_and_wait(dev, false);
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/* set standard and fast speed deviders for high/low periods */
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/* Set standard and fast speed deviders for high/low periods */
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sda_falling_time = dev->sda_falling_time ?: 300; /* ns */
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scl_falling_time = dev->scl_falling_time ?: 300; /* ns */
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@ -444,7 +444,7 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
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dw_writel(dev, dev->tx_fifo_depth / 2, DW_IC_TX_TL);
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dw_writel(dev, 0, DW_IC_RX_TL);
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/* configure the i2c master */
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/* Configure the I2C master */
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dw_writel(dev, dev->master_cfg , DW_IC_CON);
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i2c_dw_release_lock(dev);
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@ -480,7 +480,7 @@ static void i2c_dw_xfer_init(struct dw_i2c_dev *dev)
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/* Disable the adapter */
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__i2c_dw_enable_and_wait(dev, false);
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/* if the slave address is ten bit address, enable 10BITADDR */
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/* If the slave address is ten bit address, enable 10BITADDR */
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ic_con = dw_readl(dev, DW_IC_CON);
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if (msgs[dev->msg_write_idx].flags & I2C_M_TEN) {
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ic_con |= DW_IC_CON_10BITADDR_MASTER;
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@ -503,7 +503,7 @@ static void i2c_dw_xfer_init(struct dw_i2c_dev *dev)
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*/
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dw_writel(dev, msgs[dev->msg_write_idx].addr | ic_tar, DW_IC_TAR);
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/* enforce disabled interrupts (due to HW issues) */
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/* Enforce disabled interrupts (due to HW issues) */
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i2c_dw_disable_int(dev);
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/* Enable the adapter */
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@ -537,9 +537,9 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev)
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u32 flags = msgs[dev->msg_write_idx].flags;
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/*
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* if target address has changed, we need to
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* reprogram the target address in the i2c
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* adapter when we are done with this transfer
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* If target address has changed, we need to
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* reprogram the target address in the I2C
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* adapter when we are done with this transfer.
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*/
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if (msgs[dev->msg_write_idx].addr != addr) {
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dev_err(dev->dev,
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@ -599,7 +599,7 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev)
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if (msgs[dev->msg_write_idx].flags & I2C_M_RD) {
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/* avoid rx buffer overrun */
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/* Avoid rx buffer overrun */
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if (dev->rx_outstanding >= dev->rx_fifo_depth)
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break;
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@ -728,7 +728,7 @@ static int i2c_dw_handle_tx_abort(struct dw_i2c_dev *dev)
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}
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/*
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* Prepare controller for a transaction and call i2c_dw_xfer_msg
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* Prepare controller for a transaction and call i2c_dw_xfer_msg.
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*/
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static int
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i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
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@ -759,10 +759,10 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
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if (ret < 0)
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goto done;
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/* start the transfers */
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/* Start the transfers */
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i2c_dw_xfer_init(dev);
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/* wait for tx to complete */
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/* Wait for tx to complete */
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if (!wait_for_completion_timeout(&dev->cmd_complete, adap->timeout)) {
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dev_err(dev->dev, "controller timed out\n");
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/* i2c_dw_init implicitly disables the adapter */
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@ -786,7 +786,7 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
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goto done;
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}
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/* no error */
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/* No error */
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if (likely(!dev->cmd_err && !dev->status)) {
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ret = num;
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goto done;
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@ -821,8 +821,8 @@ static u32 i2c_dw_func(struct i2c_adapter *adap)
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}
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static const struct i2c_algorithm i2c_dw_algo = {
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.master_xfer = i2c_dw_xfer,
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.functionality = i2c_dw_func,
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.master_xfer = i2c_dw_xfer,
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.functionality = i2c_dw_func,
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};
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static u32 i2c_dw_read_clear_intrbits(struct dw_i2c_dev *dev)
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/*
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* Anytime TX_ABRT is set, the contents of the tx/rx
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* buffers are flushed. Make sure to skip them.
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* buffers are flushed. Make sure to skip them.
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*/
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dw_writel(dev, 0, DW_IC_INTR_MASK);
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goto tx_aborted;
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if ((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || dev->msg_err)
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complete(&dev->cmd_complete);
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else if (unlikely(dev->flags & ACCESS_INTR_MASK)) {
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/* workaround to trigger pending interrupt */
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/* Workaround to trigger pending interrupt */
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stat = dw_readl(dev, DW_IC_INTR_MASK);
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i2c_dw_disable_int(dev);
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dw_writel(dev, stat, DW_IC_INTR_MASK);
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{
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struct i2c_adapter *adap = &dev->adapter;
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unsigned long irq_flags;
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int r;
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int ret;
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init_completion(&dev->cmd_complete);
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r = i2c_dw_init(dev);
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if (r)
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return r;
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ret = i2c_dw_init(dev);
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if (ret)
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return ret;
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snprintf(adap->name, sizeof(adap->name),
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"Synopsys DesignWare I2C adapter");
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}
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i2c_dw_disable_int(dev);
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r = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr, irq_flags,
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dev_name(dev->dev), dev);
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if (r) {
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ret = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr, irq_flags,
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dev_name(dev->dev), dev);
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if (ret) {
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dev_err(dev->dev, "failure requesting irq %i: %d\n",
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dev->irq, r);
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return r;
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dev->irq, ret);
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return ret;
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}
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/*
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* registered I2C slaves that do I2C transfers in their probe.
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*/
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pm_runtime_get_noresume(dev->dev);
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r = i2c_add_numbered_adapter(adap);
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if (r)
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dev_err(dev->dev, "failure adding adapter: %d\n", r);
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ret = i2c_add_numbered_adapter(adap);
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if (ret)
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dev_err(dev->dev, "failure adding adapter: %d\n", ret);
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pm_runtime_put_noidle(dev->dev);
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return r;
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return ret;
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}
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EXPORT_SYMBOL_GPL(i2c_dw_probe);
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* @cmd_complete: tx completion indicator
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* @clk: input reference clock
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* @cmd_err: run time hadware error code
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* @msgs: points to an array of messages currently being transfered
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* @msgs: points to an array of messages currently being transferred
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* @msgs_num: the number of elements in msgs
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* @msg_write_idx: the element index of the current tx message in the msgs
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* array
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* ----------------------------------------------------------------------------
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/acpi.h>
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#include <linux/clk-provider.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/dmi.h>
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#include <linux/i2c.h>
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/err.h>
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#include <linux/errno.h>
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#include <linux/i2c.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_data/i2c-designware.h>
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <linux/pm_runtime.h>
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#include <linux/property.h>
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#include <linux/io.h>
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#include <linux/reset.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/acpi.h>
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#include <linux/platform_data/i2c-designware.h>
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#include "i2c-designware-core.h"
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static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
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static int dw_i2c_plat_probe(struct platform_device *pdev)
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{
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struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
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struct dw_i2c_dev *dev;
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struct i2c_adapter *adap;
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struct resource *mem;
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int irq, r;
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struct dw_i2c_dev *dev;
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u32 acpi_speed, ht = 0;
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struct resource *mem;
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int irq, ret;
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irq = platform_get_irq(pdev, 0);
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if (irq < 0)
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&& dev->clk_freq != 1000000 && dev->clk_freq != 3400000) {
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dev_err(&pdev->dev,
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"Only 100kHz, 400kHz, 1MHz and 3.4MHz supported");
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r = -EINVAL;
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ret = -EINVAL;
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goto exit_reset;
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}
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r = i2c_dw_probe_lock_support(dev);
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if (r)
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ret = i2c_dw_probe_lock_support(dev);
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if (ret)
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goto exit_reset;
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dev->functionality = I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY;
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pm_runtime_enable(&pdev->dev);
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}
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r = i2c_dw_probe(dev);
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if (r)
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ret = i2c_dw_probe(dev);
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if (ret)
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goto exit_probe;
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return r;
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return ret;
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exit_probe:
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if (!dev->pm_disabled)
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exit_reset:
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if (!IS_ERR_OR_NULL(dev->rst))
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reset_control_assert(dev->rst);
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return r;
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return ret;
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}
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static int dw_i2c_plat_remove(struct platform_device *pdev)
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#define DW_I2C_DEV_PMOPS NULL
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#endif
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/* work with hotplug and coldplug */
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/* Work with hotplug and coldplug */
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MODULE_ALIAS("platform:i2c_designware");
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static struct platform_driver dw_i2c_driver = {
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