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pinctrl: Convert Allwinner Pin Controller to a schema
The Allwinner SoCs have a pin controller supported in Linux, with a matching Device Tree binding. Now that we have the DT validation in place, let's convert the device tree bindings for that controller over to a YAML schemas. Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20191022160806.42971-1-mripard@kernel.org Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/allwinner,sun4i-a10-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Allwinner A10 Pin Controller Device Tree Bindings
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maintainers:
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- Chen-Yu Tsai <wens@csie.org>
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- Maxime Ripard <maxime.ripard@bootlin.com>
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properties:
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"#gpio-cells":
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const: 3
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description:
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GPIO consumers must use three arguments, first the number of the
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bank, then the pin number inside that bank, and finally the GPIO
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flags.
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"#interrupt-cells":
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const: 3
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description:
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Interrupts consumers must use three arguments, first the number
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of the bank, then the pin number inside that bank, and finally
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the interrupts flags.
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compatible:
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enum:
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- allwinner,sun4i-a10-pinctrl
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- allwinner,sun5i-a10s-pinctrl
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- allwinner,sun5i-a13-pinctrl
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- allwinner,sun6i-a31-pinctrl
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- allwinner,sun6i-a31-r-pinctrl
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- allwinner,sun6i-a31s-pinctrl
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- allwinner,sun7i-a20-pinctrl
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- allwinner,sun8i-a23-pinctrl
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- allwinner,sun8i-a23-r-pinctrl
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- allwinner,sun8i-a33-pinctrl
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- allwinner,sun8i-a83t-pinctrl
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- allwinner,sun8i-a83t-r-pinctrl
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- allwinner,sun8i-h3-pinctrl
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- allwinner,sun8i-h3-r-pinctrl
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- allwinner,sun8i-r40-pinctrl
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- allwinner,sun8i-v3-pinctrl
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- allwinner,sun8i-v3s-pinctrl
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- allwinner,sun9i-a80-pinctrl
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- allwinner,sun9i-a80-r-pinctrl
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- allwinner,sun50i-a64-pinctrl
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- allwinner,sun50i-a64-r-pinctrl
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- allwinner,sun50i-h5-pinctrl
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- allwinner,sun50i-h6-pinctrl
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- allwinner,sun50i-h6-r-pinctrl
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- allwinner,suniv-f1c100s-pinctrl
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- nextthing,gr8-pinctrl
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reg:
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maxItems: 1
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interrupts:
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minItems: 1
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maxItems: 5
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description:
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One interrupt per external interrupt bank supported on the
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controller, sorted by bank number ascending order.
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clocks:
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items:
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- description: Bus Clock
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- description: High Frequency Oscillator
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- description: Low Frequency Oscillator
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clock-names:
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items:
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- const: apb
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- const: hosc
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- const: losc
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resets:
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maxItems: 1
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gpio-controller: true
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interrupt-controller: true
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gpio-line-names: true
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input-debounce:
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allOf:
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- $ref: /schemas/types.yaml#/definitions/uint32-array
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- minItems: 1
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maxItems: 5
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description:
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Debouncing periods in microseconds, one period per interrupt
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bank found in the controller
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patternProperties:
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# It's pretty scary, but the basic idea is that:
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# - One node name can start with either s- or r- for PRCM nodes,
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# - Then, the name itself can be any repetition of <string>- (to
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# accomodate with nodes like uart4-rts-cts-pins), where each
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# string can be either starting with 'p' but in a string longer
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# than 3, or something that doesn't start with 'p',
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# - Then, the bank name is optional and will be between pa and pg,
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# pl or pm. Some pins groups that have several options will have
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# the pin numbers then,
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# - Finally, the name will end with either -pin or pins.
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"^([rs]-)?(([a-z0-9]{3,}|[a-oq-z][a-z0-9]*?)?-)+?(p[a-ilm][0-9]*?-)??pins?$":
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type: object
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properties:
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pins: true
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function: true
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bias-disable: true
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bias-pull-up: true
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bias-pull-down: true
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drive-strength:
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allOf:
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- $ref: /schemas/types.yaml#/definitions/uint32
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- enum: [ 10, 20, 30, 40 ]
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required:
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- pins
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- function
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additionalProperties: false
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"^vcc-p[a-hlm]-supply$":
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description:
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Power supplies for pin banks.
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required:
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- "#gpio-cells"
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- "#interrupt-cells"
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- gpio-controller
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- interrupt-controller
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allOf:
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# FIXME: We should have the pin bank supplies here, but not a lot of
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# boards are defining it at the moment so it would generate a lot of
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# warnings.
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- if:
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properties:
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compatible:
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enum:
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- allwinner,sun9i-a80-pinctrl
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then:
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properties:
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interrupts:
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minItems: 5
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maxItems: 5
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else:
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if:
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properties:
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compatible:
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enum:
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- allwinner,sun6i-a31-pinctrl
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- allwinner,sun6i-a31s-pinctrl
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- allwinner,sun50i-h6-pinctrl
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then:
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properties:
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interrupts:
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minItems: 4
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maxItems: 4
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else:
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if:
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properties:
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compatible:
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enum:
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- allwinner,sun8i-a23-pinctrl
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- allwinner,sun8i-a83t-pinctrl
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- allwinner,sun50i-a64-pinctrl
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- allwinner,sun50i-h5-pinctrl
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- allwinner,suniv-f1c100s-pinctrl
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then:
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properties:
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interrupts:
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minItems: 3
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maxItems: 3
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else:
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if:
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properties:
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compatible:
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enum:
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- allwinner,sun6i-a31-r-pinctrl
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- allwinner,sun8i-a33-pinctrl
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- allwinner,sun8i-h3-pinctrl
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- allwinner,sun8i-v3-pinctrl
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- allwinner,sun8i-v3s-pinctrl
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- allwinner,sun9i-a80-r-pinctrl
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- allwinner,sun50i-h6-r-pinctrl
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then:
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properties:
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interrupts:
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minItems: 2
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maxItems: 2
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else:
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properties:
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interrupts:
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minItems: 1
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maxItems: 1
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/sun5i-ccu.h>
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pio: pinctrl@1c20800 {
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compatible = "allwinner,sun5i-a13-pinctrl";
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reg = <0x01c20800 0x400>;
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interrupts = <28>;
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clocks = <&ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
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clock-names = "apb", "hosc", "losc";
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <3>;
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#gpio-cells = <3>;
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uart1_pe_pins: uart1-pe-pins {
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pins = "PE10", "PE11";
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function = "uart1";
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};
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uart1_pg_pins: uart1-pg-pins {
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pins = "PG3", "PG4";
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function = "uart1";
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};
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};
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@ -1,164 +0,0 @@
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* Allwinner A1X Pin Controller
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The pins controlled by sunXi pin controller are organized in banks,
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each bank has 32 pins. Each pin has 7 multiplexing functions, with
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the first two functions being GPIO in and out. The configuration on
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the pins includes drive strength and pull-up.
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Required properties:
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- compatible: Should be one of the following (depending on your SoC):
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"allwinner,sun4i-a10-pinctrl"
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"allwinner,sun5i-a10s-pinctrl"
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"allwinner,sun5i-a13-pinctrl"
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"allwinner,sun6i-a31-pinctrl"
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"allwinner,sun6i-a31s-pinctrl"
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"allwinner,sun6i-a31-r-pinctrl"
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"allwinner,sun7i-a20-pinctrl"
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"allwinner,sun8i-a23-pinctrl"
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"allwinner,sun8i-a23-r-pinctrl"
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"allwinner,sun8i-a33-pinctrl"
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"allwinner,sun9i-a80-pinctrl"
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"allwinner,sun9i-a80-r-pinctrl"
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"allwinner,sun8i-a83t-pinctrl"
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"allwinner,sun8i-a83t-r-pinctrl"
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"allwinner,sun8i-h3-pinctrl"
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"allwinner,sun8i-h3-r-pinctrl"
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"allwinner,sun8i-r40-pinctrl"
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"allwinner,sun8i-v3-pinctrl"
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"allwinner,sun8i-v3s-pinctrl"
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"allwinner,sun50i-a64-pinctrl"
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"allwinner,sun50i-a64-r-pinctrl"
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"allwinner,sun50i-h5-pinctrl"
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"allwinner,sun50i-h6-pinctrl"
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"allwinner,sun50i-h6-r-pinctrl"
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"allwinner,suniv-f1c100s-pinctrl"
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"nextthing,gr8-pinctrl"
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- reg: Should contain the register physical address and length for the
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pin controller.
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- clocks: phandle to the clocks feeding the pin controller:
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- "apb": the gated APB parent clock
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- "hosc": the high frequency oscillator in the system
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- "losc": the low frequency oscillator in the system
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Note: For backward compatibility reasons, the hosc and losc clocks are only
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required if you need to use the optional input-debounce property. Any new
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device tree should set them.
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Each pin bank, depending on the SoC, can have an associated regulator:
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- vcc-pa-supply: for the A10, A20, A31, A31s, A80 and R40 SoCs
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- vcc-pb-supply: for the A31, A31s, A80 and V3s SoCs
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- vcc-pc-supply: for the A10, A20, A31, A31s, A64, A80, H5, R40 and V3s SoCs
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- vcc-pd-supply: for the A23, A31, A31s, A64, A80, A83t, H3, H5 and R40 SoCs
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- vcc-pe-supply: for the A10, A20, A31, A31s, A64, A80, R40 and V3s SoCs
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- vcc-pf-supply: for the A10, A20, A31, A31s, A80, R40 and V3s SoCs
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- vcc-pg-supply: for the A10, A20, A31, A31s, A64, A80, H3, H5, R40 and V3s SoCs
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- vcc-ph-supply: for the A31, A31s and A80 SoCs
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- vcc-pl-supply: for the r-pinctrl of the A64, A80 and A83t SoCs
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- vcc-pm-supply: for the r-pinctrl of the A31, A31s and A80 SoCs
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Optional properties:
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- input-debounce: Array of debouncing periods in microseconds. One period per
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irq bank found in the controller. 0 if no setup required.
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Please refer to pinctrl-bindings.txt in this directory for details of the
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common pinctrl bindings used by client devices.
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A pinctrl node should contain at least one subnodes representing the
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pinctrl groups available on the machine. Each subnode will list the
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pins it needs, and how they should be configured, with regard to muxer
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configuration, drive strength and pullups. If one of these options is
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not set, its actual value will be unspecified.
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Allwinner A1X Pin Controller supports the generic pin multiplexing and
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configuration bindings. For details on each properties, you can refer to
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./pinctrl-bindings.txt.
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Required sub-node properties:
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- pins
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- function
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Optional sub-node properties:
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- bias-disable
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- bias-pull-up
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- bias-pull-down
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- drive-strength
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*** Deprecated pin configuration and multiplexing binding
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Required subnode-properties:
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- allwinner,pins: List of strings containing the pin name.
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- allwinner,function: Function to mux the pins listed above to.
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Optional subnode-properties:
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- allwinner,drive: Integer. Represents the current sent to the pin
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0: 10 mA
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1: 20 mA
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2: 30 mA
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3: 40 mA
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- allwinner,pull: Integer.
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0: No resistor
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1: Pull-up resistor
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2: Pull-down resistor
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Examples:
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pio: pinctrl@1c20800 {
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compatible = "allwinner,sun5i-a13-pinctrl";
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reg = <0x01c20800 0x400>;
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#address-cells = <1>;
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#size-cells = <0>;
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uart1_pins_a: uart1@0 {
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allwinner,pins = "PE10", "PE11";
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allwinner,function = "uart1";
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allwinner,drive = <0>;
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allwinner,pull = <0>;
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};
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uart1_pins_b: uart1@1 {
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allwinner,pins = "PG3", "PG4";
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allwinner,function = "uart1";
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allwinner,drive = <0>;
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allwinner,pull = <0>;
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};
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};
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GPIO and interrupt controller
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-----------------------------
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This hardware also acts as a GPIO controller and an interrupt
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controller.
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Consumers that would want to refer to one or the other (or both)
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should provide through the usual *-gpios and interrupts properties a
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cell with 3 arguments, first the number of the bank, then the pin
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inside that bank, and finally the flags for the GPIO/interrupts.
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Example:
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xio: gpio@38 {
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compatible = "nxp,pcf8574a";
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reg = <0x38>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&pio>;
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interrupts = <6 0 IRQ_TYPE_EDGE_FALLING>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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reg_usb1_vbus: usb1-vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb1-vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>;
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};
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