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[media] Staging: cx25821: fix braces and space coding style issues
Errors found by the checkpatch.pl tool. [mchehab@redhat.com: merged a series of CodingStyle cleanup patches for cx25851. They're all from the same author, and patches the same driver] Signed-off-by: Ruslan Pisarev <ruslan@rpisarev.org.ua> Cc: Palash Bandyopadhyay <Palash.Bandyopadhyay@conexant.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
parent
01bc799186
commit
e4115bb284
12 changed files with 168 additions and 179 deletions
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@ -764,9 +764,8 @@ int cx25821_audio_upstream_init(struct cx25821_dev *dev, int channel_select)
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str_length + 1);
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/* Default if filename is empty string */
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if (strcmp(dev->input_audiofilename, "") == 0) {
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if (strcmp(dev->input_audiofilename, "") == 0)
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dev->_audiofilename = "/root/audioGOOD.wav";
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}
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} else {
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str_length = strlen(_defaultAudioName);
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dev->_audiofilename = kmalloc(str_length + 1, GFP_KERNEL);
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@ -31,9 +31,9 @@
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#define NUMBER_OF_PROGRAMS 8
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/*
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Max size of the RISC program for a buffer. - worst case is 2 writes per line
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Space is also added for the 4 no-op instructions added on the end.
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*/
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* Max size of the RISC program for a buffer. - worst case is 2 writes per line
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* Space is also added for the 4 no-op instructions added on the end.
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*/
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#ifndef USE_RISC_NOOP
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#define MAX_BUFFER_PROGRAM_SIZE \
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(2*LINES_PER_BUFFER*RISC_WRITE_INSTRUCTION_SIZE + RISC_WRITECR_INSTRUCTION_SIZE*4)
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@ -42,7 +42,7 @@ static unsigned int card[] = {[0 ... (CX25821_MAXBOARDS - 1)] = UNSET };
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module_param_array(card, int, NULL, 0444);
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MODULE_PARM_DESC(card, "card type");
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static unsigned int cx25821_devcount = 0;
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static unsigned int cx25821_devcount;
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static DEFINE_MUTEX(devlist);
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LIST_HEAD(cx25821_devlist);
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@ -785,8 +785,8 @@ static void cx25821_shutdown(struct cx25821_dev *dev)
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cx_write(dev->channels[i].sram_channels->int_msk, 0);
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}
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for (i = VID_UPSTREAM_SRAM_CHANNEL_I; i <= VID_UPSTREAM_SRAM_CHANNEL_J;
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i++) {
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for (i = VID_UPSTREAM_SRAM_CHANNEL_I;
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i <= VID_UPSTREAM_SRAM_CHANNEL_J; i++) {
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cx_write(dev->channels[i].sram_channels->dma_ctl, 0);
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cx_write(dev->channels[i].sram_channels->int_msk, 0);
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}
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@ -851,8 +851,8 @@ static void cx25821_initialize(struct cx25821_dev *dev)
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}
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/* Probably only affect Downstream */
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for (i = VID_UPSTREAM_SRAM_CHANNEL_I; i <= VID_UPSTREAM_SRAM_CHANNEL_J;
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i++) {
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for (i = VID_UPSTREAM_SRAM_CHANNEL_I;
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i <= VID_UPSTREAM_SRAM_CHANNEL_J; i++) {
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cx25821_set_vip_mode(dev, dev->channels[i].sram_channels);
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}
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@ -163,8 +163,8 @@
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#define FLD_VID_DST_RISC2 0x00000010
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#define FLD_VID_SRC_RISC1 0x00000002
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#define FLD_VID_DST_RISC1 0x00000001
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#define FLD_VID_SRC_ERRORS FLD_VID_SRC_OPC_ERR | FLD_VID_SRC_SYNC | FLD_VID_SRC_UF
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#define FLD_VID_DST_ERRORS FLD_VID_DST_OPC_ERR | FLD_VID_DST_SYNC | FLD_VID_DST_OF
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#define FLD_VID_SRC_ERRORS (FLD_VID_SRC_OPC_ERR | FLD_VID_SRC_SYNC | FLD_VID_SRC_UF)
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#define FLD_VID_DST_ERRORS (FLD_VID_DST_OPC_ERR | FLD_VID_DST_SYNC | FLD_VID_DST_OF)
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/* ***************************************************************************** */
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#define AUD_A_INT_MSK 0x0400C0 /* Audio Int interrupt mask */
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@ -32,7 +32,7 @@
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#include <linux/file.h>
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#include <linux/fcntl.h>
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#include <linux/slab.h>
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#include <asm/uaccess.h>
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#include <linux/uaccess.h>
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MODULE_DESCRIPTION("v4l2 driver module for cx25821 based TV cards");
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MODULE_AUTHOR("Hiep Huynh <hiep.huynh@conexant.com>");
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@ -42,7 +42,7 @@ static int _intr_msk =
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FLD_VID_SRC_RISC1 | FLD_VID_SRC_UF | FLD_VID_SRC_SYNC | FLD_VID_SRC_OPC_ERR;
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static __le32 *cx25821_update_riscprogram_ch2(struct cx25821_dev *dev,
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__le32 * rp, unsigned int offset,
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__le32 *rp, unsigned int offset,
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unsigned int bpl, u32 sync_line,
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unsigned int lines,
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int fifo_enable, int field_type)
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@ -53,10 +53,9 @@ static __le32 *cx25821_update_riscprogram_ch2(struct cx25821_dev *dev,
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*(rp++) = cpu_to_le32(RISC_RESYNC | sync_line);
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if (USE_RISC_NOOP_VIDEO) {
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for (i = 0; i < NUM_NO_OPS; i++) {
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for (i = 0; i < NUM_NO_OPS; i++)
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*(rp++) = cpu_to_le32(RISC_NOOP);
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}
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}
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/* scan lines */
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for (line = 0; line < lines; line++) {
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@ -75,7 +74,7 @@ static __le32 *cx25821_update_riscprogram_ch2(struct cx25821_dev *dev,
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}
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static __le32 *cx25821_risc_field_upstream_ch2(struct cx25821_dev *dev,
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__le32 * rp,
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__le32 *rp,
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dma_addr_t databuf_phys_addr,
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unsigned int offset,
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u32 sync_line, unsigned int bpl,
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@ -88,15 +87,13 @@ static __le32 *cx25821_risc_field_upstream_ch2(struct cx25821_dev *dev,
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int dist_betwn_starts = bpl * 2;
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/* sync instruction */
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if (sync_line != NO_SYNC_LINE) {
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if (sync_line != NO_SYNC_LINE)
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*(rp++) = cpu_to_le32(RISC_RESYNC | sync_line);
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}
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if (USE_RISC_NOOP_VIDEO) {
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for (i = 0; i < NUM_NO_OPS; i++) {
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for (i = 0; i < NUM_NO_OPS; i++)
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*(rp++) = cpu_to_le32(RISC_NOOP);
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}
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}
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/* scan lines */
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for (line = 0; line < lines; line++) {
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@ -250,9 +247,8 @@ void cx25821_stop_upstream_video_ch2(struct cx25821_dev *dev)
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void cx25821_free_mem_upstream_ch2(struct cx25821_dev *dev)
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{
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if (dev->_is_running_ch2) {
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if (dev->_is_running_ch2)
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cx25821_stop_upstream_video_ch2(dev);
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}
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if (dev->_dma_virt_addr_ch2) {
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pci_free_consistent(dev->pci, dev->_risc_size_ch2,
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@ -303,10 +299,9 @@ int cx25821_get_frame_ch2(struct cx25821_dev *dev, struct sram_channel *sram_ch)
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file_offset = dev->_frame_count_ch2 * frame_size;
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myfile = filp_open(dev->_filename_ch2, O_RDONLY | O_LARGEFILE, 0);
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if (IS_ERR(myfile)) {
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const int open_errno = -PTR_ERR(myfile);
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printk("%s(): ERROR opening file(%s) with errno = %d! \n",
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printk("%s(): ERROR opening file(%s) with errno = %d!\n",
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__func__, dev->_filename_ch2, open_errno);
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return PTR_ERR(myfile);
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} else {
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@ -371,7 +366,7 @@ static void cx25821_vidups_handler_ch2(struct work_struct *work)
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container_of(work, struct cx25821_dev, _irq_work_entry_ch2);
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if (!dev) {
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printk("ERROR %s(): since container_of(work_struct) FAILED! \n",
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printk("ERROR %s(): since container_of(work_struct) FAILED!\n",
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__func__);
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return;
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}
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@ -398,7 +393,7 @@ int cx25821_openfile_ch2(struct cx25821_dev *dev, struct sram_channel *sram_ch)
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if (IS_ERR(myfile)) {
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const int open_errno = -PTR_ERR(myfile);
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printk("%s(): ERROR opening file(%s) with errno = %d! \n",
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printk("%s(): ERROR opening file(%s) with errno = %d!\n",
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__func__, dev->_filename_ch2, open_errno);
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return PTR_ERR(myfile);
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} else {
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@ -450,10 +445,9 @@ int cx25821_openfile_ch2(struct cx25821_dev *dev, struct sram_channel *sram_ch)
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if (i > 0)
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dev->_frame_count_ch2++;
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if (vfs_read_retval < line_size) {
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if (vfs_read_retval < line_size)
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break;
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}
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}
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dev->_file_status_ch2 =
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(vfs_read_retval == line_size) ? IN_PROGRESS : END_OF_FILE;
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dev->_lines_count_ch2);
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if (ret < 0) {
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printk(KERN_INFO
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"cx25821: Failed creating Video Upstream Risc programs! \n");
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"cx25821: Failed creating Video Upstream Risc programs!\n");
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goto error;
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}
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u32 prog_cnt = cx_read(channel->gpcnt);
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/*
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Since we've identified our IRQ, clear our bits from the
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interrupt mask and interrupt status registers
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* Since we've identified our IRQ, clear our bits from the
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* interrupt mask and interrupt status registers
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*/
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int_msk_tmp = cx_read(channel->int_msk);
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cx_write(channel->int_msk, int_msk_tmp & ~_intr_msk);
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return -1;
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channel_num = VID_UPSTREAM_SRAM_CHANNEL_J;
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sram_ch = dev->channels[channel_num].sram_channels;
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msk_stat = cx_read(sram_ch->int_mstat);
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vid_status);
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}
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if (handled < 0) {
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if (handled < 0)
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cx25821_stop_upstream_video_ch2(dev);
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} else {
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else
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handled += handled;
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}
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return IRQ_RETVAL(handled);
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}
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cx_write(ch->vid_fmt_ctl, value);
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/*
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set number of active pixels in each line. Default is 720
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pixels in both NTSC and PAL format
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* set number of active pixels in each line. Default is 720
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* pixels in both NTSC and PAL format
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*/
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cx_write(ch->vid_active_ctl1, width);
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num_lines = (height / 2) & 0x3FF;
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odd_num_lines = num_lines;
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if (dev->_isNTSC_ch2) {
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if (dev->_isNTSC_ch2)
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odd_num_lines += 1;
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}
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value = (num_lines << 16) | odd_num_lines;
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int err = 0;
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/*
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656/VIP SRC Upstream Channel I & J and 7 - Host Bus Interface
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for channel A-C
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* 656/VIP SRC Upstream Channel I & J and 7 - Host Bus Interface
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* for channel A-C
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*/
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tmp = cx_read(VID_CH_MODE_SEL);
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cx_write(VID_CH_MODE_SEL, tmp | 0x1B0001FF);
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/*
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Set the physical start address of the RISC program in the initial
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program counter(IPC) member of the cmds.
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* Set the physical start address of the RISC program in the initial
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* program counter(IPC) member of the cmds.
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*/
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cx_write(sram_ch->cmds_start + 0, dev->_dma_phys_addr_ch2);
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cx_write(sram_ch->cmds_start + 4, 0); /* Risc IPC High 64 bits 63-32 */
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return -ENOMEM;
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}
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/*
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656/VIP SRC Upstream Channel I & J and 7 -
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Host Bus Interface for channel A-C
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* 656/VIP SRC Upstream Channel I & J and 7 -
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* Host Bus Interface for channel A-C
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*/
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tmp = cx_read(VID_CH_MODE_SEL);
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cx_write(VID_CH_MODE_SEL, tmp | 0x1B0001FF);
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@ -88,14 +88,14 @@
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#endif
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#ifndef USE_RISC_NOOP_VIDEO
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#define PAL_US_VID_PROG_SIZE ((PAL_FIELD_HEIGHT + 1) * 3 * DWORD_SIZE + RISC_WRITECR_INSTRUCTION_SIZE )
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#define PAL_RISC_BUF_SIZE ( 2 * (RISC_SYNC_INSTRUCTION_SIZE + PAL_US_VID_PROG_SIZE) )
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#define PAL_US_VID_PROG_SIZE ((PAL_FIELD_HEIGHT + 1) * 3 * DWORD_SIZE + RISC_WRITECR_INSTRUCTION_SIZE)
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#define PAL_RISC_BUF_SIZE (2 * (RISC_SYNC_INSTRUCTION_SIZE + PAL_US_VID_PROG_SIZE))
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#define PAL_VID_PROG_SIZE ((PAL_FIELD_HEIGHT*2) * 3 * DWORD_SIZE + 2*RISC_SYNC_INSTRUCTION_SIZE + \
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RISC_WRITECR_INSTRUCTION_SIZE + JUMP_INSTRUCTION_SIZE )
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#define ODD_FLD_PAL_PROG_SIZE ((PAL_FIELD_HEIGHT) * 3 * DWORD_SIZE + RISC_SYNC_INSTRUCTION_SIZE + RISC_WRITECR_INSTRUCTION_SIZE )
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#define ODD_FLD_NTSC_PROG_SIZE ((NTSC_ODD_FLD_LINES) * 3 * DWORD_SIZE + RISC_SYNC_INSTRUCTION_SIZE + RISC_WRITECR_INSTRUCTION_SIZE )
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RISC_WRITECR_INSTRUCTION_SIZE + JUMP_INSTRUCTION_SIZE)
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#define ODD_FLD_PAL_PROG_SIZE ((PAL_FIELD_HEIGHT) * 3 * DWORD_SIZE + RISC_SYNC_INSTRUCTION_SIZE + RISC_WRITECR_INSTRUCTION_SIZE)
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#define ODD_FLD_NTSC_PROG_SIZE ((NTSC_ODD_FLD_LINES) * 3 * DWORD_SIZE + RISC_SYNC_INSTRUCTION_SIZE + RISC_WRITECR_INSTRUCTION_SIZE)
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#define NTSC_US_VID_PROG_SIZE ((NTSC_ODD_FLD_LINES + 1) * 3 * DWORD_SIZE + RISC_WRITECR_INSTRUCTION_SIZE + JUMP_INSTRUCTION_SIZE)
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#define NTSC_RISC_BUF_SIZE (2 * (RISC_SYNC_INSTRUCTION_SIZE + NTSC_US_VID_PROG_SIZE) )
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#define NTSC_RISC_BUF_SIZE (2 * (RISC_SYNC_INSTRUCTION_SIZE + NTSC_US_VID_PROG_SIZE))
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#define FRAME1_VID_PROG_SIZE ((NTSC_ODD_FLD_LINES + NTSC_FIELD_HEIGHT) * 3 * DWORD_SIZE + 2*RISC_SYNC_INSTRUCTION_SIZE + \
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RISC_WRITECR_INSTRUCTION_SIZE + JUMP_INSTRUCTION_SIZE )
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RISC_WRITECR_INSTRUCTION_SIZE + JUMP_INSTRUCTION_SIZE)
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#endif
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@ -97,13 +97,13 @@
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#define PAL_RISC_BUF_SIZE (2 * PAL_US_VID_PROG_SIZE)
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#define PAL_VID_PROG_SIZE ((PAL_FIELD_HEIGHT*2) * 3 * DWORD_SIZE + 2*RISC_SYNC_INSTRUCTION_SIZE + \
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RISC_WRITECR_INSTRUCTION_SIZE + JUMP_INSTRUCTION_SIZE )
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RISC_WRITECR_INSTRUCTION_SIZE + JUMP_INSTRUCTION_SIZE)
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#define ODD_FLD_PAL_PROG_SIZE ((PAL_FIELD_HEIGHT) * 3 * DWORD_SIZE + RISC_SYNC_INSTRUCTION_SIZE + RISC_WRITECR_INSTRUCTION_SIZE )
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#define ODD_FLD_NTSC_PROG_SIZE ((NTSC_ODD_FLD_LINES) * 3 * DWORD_SIZE + RISC_SYNC_INSTRUCTION_SIZE + RISC_WRITECR_INSTRUCTION_SIZE )
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#define ODD_FLD_PAL_PROG_SIZE ((PAL_FIELD_HEIGHT) * 3 * DWORD_SIZE + RISC_SYNC_INSTRUCTION_SIZE + RISC_WRITECR_INSTRUCTION_SIZE)
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#define ODD_FLD_NTSC_PROG_SIZE ((NTSC_ODD_FLD_LINES) * 3 * DWORD_SIZE + RISC_SYNC_INSTRUCTION_SIZE + RISC_WRITECR_INSTRUCTION_SIZE)
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#define NTSC_US_VID_PROG_SIZE ((NTSC_ODD_FLD_LINES + 1) * 3 * DWORD_SIZE + RISC_WRITECR_INSTRUCTION_SIZE + JUMP_INSTRUCTION_SIZE)
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#define NTSC_RISC_BUF_SIZE ( 2 * (RISC_SYNC_INSTRUCTION_SIZE + NTSC_US_VID_PROG_SIZE) )
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#define NTSC_RISC_BUF_SIZE (2 * (RISC_SYNC_INSTRUCTION_SIZE + NTSC_US_VID_PROG_SIZE))
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#define FRAME1_VID_PROG_SIZE ((NTSC_ODD_FLD_LINES + NTSC_FIELD_HEIGHT) * 3 * DWORD_SIZE + 2*RISC_SYNC_INSTRUCTION_SIZE + \
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RISC_WRITECR_INSTRUCTION_SIZE + JUMP_INSTRUCTION_SIZE )
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RISC_WRITECR_INSTRUCTION_SIZE + JUMP_INSTRUCTION_SIZE)
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#endif
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@ -94,7 +94,7 @@
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V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_M_KR | \
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V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
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V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_H | \
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V4L2_STD_PAL_Nc )
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V4L2_STD_PAL_Nc)
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#define CX25821_BOARD_CONEXANT_ATHENA10 1
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#define MAX_VID_CHANNEL_NUM 12
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@ -244,7 +244,6 @@ struct cx25821_channel {
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int ctl_contrast;
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int ctl_hue;
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int ctl_saturation;
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struct cx25821_data timeout_data;
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struct video_device *video_dev;
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