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qlge: Add support for varied pcie function numbers.
Currently we support only PCIe NIC functions zero and one, and FCoE functions as 3 and 4. Future configurations can mix these up in any fashion. This patch removes the 0-1 dependancy and allows usage of any of the 4 functions. We also find the alternate NIC function (if exist) and determine our port number based on the comparison of the two functions: Lower function number gets first port, higher function gets second port. Signed-off-by: Ron Mercer <ron.mercer@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
542512e482
commit
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2 changed files with 69 additions and 7 deletions
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@ -65,6 +65,17 @@
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#define DB_PAGE_SIZE 4096
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#define DB_PAGE_SIZE 4096
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/* MPI test register definitions. This register
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* is used for determining alternate NIC function's
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* PCI->func number.
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*/
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enum {
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MPI_TEST_FUNC_PORT_CFG = 0x1002,
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MPI_TEST_NIC1_FUNC_SHIFT = 1,
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MPI_TEST_NIC2_FUNC_SHIFT = 5,
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MPI_TEST_NIC_FUNC_MASK = 0x00000007,
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};
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/*
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/*
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* Processor Address Register (PROC_ADDR) bit definitions.
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* Processor Address Register (PROC_ADDR) bit definitions.
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*/
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*/
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@ -1432,6 +1443,8 @@ struct ql_adapter {
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u32 chip_rev_id;
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u32 chip_rev_id;
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u32 fw_rev_id;
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u32 fw_rev_id;
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u32 func; /* PCI function for this adapter */
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u32 func; /* PCI function for this adapter */
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u32 alt_func; /* PCI function for alternate adapter */
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u32 port; /* Port number this adapter */
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spinlock_t adapter_lock;
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spinlock_t adapter_lock;
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spinlock_t hw_lock;
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spinlock_t hw_lock;
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@ -1581,6 +1594,7 @@ void ql_mpi_idc_work(struct work_struct *work);
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void ql_mpi_port_cfg_work(struct work_struct *work);
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void ql_mpi_port_cfg_work(struct work_struct *work);
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int ql_mb_get_fw_state(struct ql_adapter *qdev);
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int ql_mb_get_fw_state(struct ql_adapter *qdev);
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int ql_cam_route_initialize(struct ql_adapter *qdev);
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int ql_cam_route_initialize(struct ql_adapter *qdev);
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int ql_read_mpi_reg(struct ql_adapter *qdev, u32 reg, u32 *data);
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int ql_mb_about_fw(struct ql_adapter *qdev);
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int ql_mb_about_fw(struct ql_adapter *qdev);
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#if 1
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#if 1
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@ -680,7 +680,7 @@ static int ql_get_8000_flash_params(struct ql_adapter *qdev)
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/* Get flash offset for function and adjust
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/* Get flash offset for function and adjust
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* for dword access.
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* for dword access.
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*/
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*/
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if (!qdev->func)
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if (!qdev->port)
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offset = FUNC0_FLASH_OFFSET / sizeof(u32);
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offset = FUNC0_FLASH_OFFSET / sizeof(u32);
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else
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else
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offset = FUNC1_FLASH_OFFSET / sizeof(u32);
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offset = FUNC1_FLASH_OFFSET / sizeof(u32);
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@ -744,7 +744,7 @@ static int ql_get_8012_flash_params(struct ql_adapter *qdev)
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/* Second function's parameters follow the first
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/* Second function's parameters follow the first
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* function's.
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* function's.
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*/
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*/
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if (qdev->func)
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if (qdev->port)
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offset = size;
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offset = size;
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if (ql_sem_spinlock(qdev, SEM_FLASH_MASK))
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if (ql_sem_spinlock(qdev, SEM_FLASH_MASK))
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@ -3220,9 +3220,10 @@ static void ql_display_dev_info(struct net_device *ndev)
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struct ql_adapter *qdev = (struct ql_adapter *)netdev_priv(ndev);
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struct ql_adapter *qdev = (struct ql_adapter *)netdev_priv(ndev);
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QPRINTK(qdev, PROBE, INFO,
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QPRINTK(qdev, PROBE, INFO,
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"Function #%d, NIC Roll %d, NIC Rev = %d, "
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"Function #%d, Port %d, NIC Roll %d, NIC Rev = %d, "
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"XG Roll = %d, XG Rev = %d.\n",
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"XG Roll = %d, XG Rev = %d.\n",
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qdev->func,
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qdev->func,
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qdev->port,
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qdev->chip_rev_id & 0x0000000f,
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qdev->chip_rev_id & 0x0000000f,
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qdev->chip_rev_id >> 4 & 0x0000000f,
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qdev->chip_rev_id >> 4 & 0x0000000f,
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qdev->chip_rev_id >> 8 & 0x0000000f,
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qdev->chip_rev_id >> 8 & 0x0000000f,
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@ -3677,12 +3678,53 @@ static struct nic_operations qla8000_nic_ops = {
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.port_initialize = ql_8000_port_initialize,
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.port_initialize = ql_8000_port_initialize,
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};
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};
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/* Find the pcie function number for the other NIC
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static void ql_get_board_info(struct ql_adapter *qdev)
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* on this chip. Since both NIC functions share a
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* common firmware we have the lowest enabled function
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* do any common work. Examples would be resetting
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* after a fatal firmware error, or doing a firmware
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* coredump.
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*/
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static int ql_get_alt_pcie_func(struct ql_adapter *qdev)
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{
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{
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int status = 0;
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u32 temp;
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u32 nic_func1, nic_func2;
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status = ql_read_mpi_reg(qdev, MPI_TEST_FUNC_PORT_CFG,
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&temp);
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if (status)
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return status;
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nic_func1 = ((temp >> MPI_TEST_NIC1_FUNC_SHIFT) &
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MPI_TEST_NIC_FUNC_MASK);
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nic_func2 = ((temp >> MPI_TEST_NIC2_FUNC_SHIFT) &
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MPI_TEST_NIC_FUNC_MASK);
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if (qdev->func == nic_func1)
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qdev->alt_func = nic_func2;
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else if (qdev->func == nic_func2)
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qdev->alt_func = nic_func1;
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else
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status = -EIO;
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return status;
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}
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static int ql_get_board_info(struct ql_adapter *qdev)
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{
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int status;
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qdev->func =
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qdev->func =
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(ql_read32(qdev, STS) & STS_FUNC_ID_MASK) >> STS_FUNC_ID_SHIFT;
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(ql_read32(qdev, STS) & STS_FUNC_ID_MASK) >> STS_FUNC_ID_SHIFT;
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if (qdev->func) {
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if (qdev->func > 3)
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return -EIO;
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status = ql_get_alt_pcie_func(qdev);
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if (status)
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return status;
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qdev->port = (qdev->func < qdev->alt_func) ? 0 : 1;
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if (qdev->port) {
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qdev->xg_sem_mask = SEM_XGMAC1_MASK;
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qdev->xg_sem_mask = SEM_XGMAC1_MASK;
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qdev->port_link_up = STS_PL1;
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qdev->port_link_up = STS_PL1;
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qdev->port_init = STS_PI1;
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qdev->port_init = STS_PI1;
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@ -3701,6 +3743,7 @@ static void ql_get_board_info(struct ql_adapter *qdev)
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qdev->nic_ops = &qla8012_nic_ops;
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qdev->nic_ops = &qla8012_nic_ops;
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else if (qdev->device_id == QLGE_DEVICE_ID_8000)
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else if (qdev->device_id == QLGE_DEVICE_ID_8000)
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qdev->nic_ops = &qla8000_nic_ops;
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qdev->nic_ops = &qla8000_nic_ops;
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return status;
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}
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}
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static void ql_release_all(struct pci_dev *pdev)
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static void ql_release_all(struct pci_dev *pdev)
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@ -3795,7 +3838,12 @@ static int __devinit ql_init_device(struct pci_dev *pdev,
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qdev->ndev = ndev;
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qdev->ndev = ndev;
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qdev->pdev = pdev;
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qdev->pdev = pdev;
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ql_get_board_info(qdev);
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err = ql_get_board_info(qdev);
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if (err) {
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dev_err(&pdev->dev, "Register access failed.\n");
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err = -EIO;
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goto err_out;
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}
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qdev->msg_enable = netif_msg_init(debug, default_msg);
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qdev->msg_enable = netif_msg_init(debug, default_msg);
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spin_lock_init(&qdev->hw_lock);
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spin_lock_init(&qdev->hw_lock);
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spin_lock_init(&qdev->stats_lock);
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spin_lock_init(&qdev->stats_lock);
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