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m68knommu: mask off all interrupts in ColdFire intc-simr controller
The ColdFire intc-simr interrupt controller should mask off all interrupt sources at init time. Doing it here instead of separately in each platform setup. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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2 changed files with 5 additions and 33 deletions
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@ -56,8 +56,6 @@
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#define MCFSIM_DMA3ICR MCFSIM_ICR9 /* DMA 3 ICR */
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#define MCFSIM_IMR_MASKALL 0xFFFFFFFF /* All SIM intr sources */
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#define MCFINTC0_SIMR 0xFC04801C
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#define MCFINTC0_CIMR 0xFC04801D
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#define MCFINTC0_ICR0 0xFC048040
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@ -69,37 +67,6 @@
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#define MCFSIM_ICR_TIMER2 (0xFC048040+33)
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/*
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* Macro to set IMR register. It is 32 bits on the 5307.
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*/
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#define mcf_getimr() \
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*((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR))
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#define mcf_setimr(imr) \
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*((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR)) = (imr);
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#define mcf_getipr() \
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*((volatile unsigned long *) (MCF_MBAR + MCFSIM_IPR))
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#define mcf_getiprl() \
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*((volatile unsigned long *) (MCF_MBAR + MCFSIM_IPRL))
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#define mcf_getiprh() \
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*((volatile unsigned long *) (MCF_MBAR + MCFSIM_IPRH))
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#define mcf_enable_irq0(irq) \
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*((volatile unsigned char *) (MCFINTC0_CIMR)) = (irq);
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#define mcf_enable_irq1(irq) \
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*((volatile unsigned char *) (MCFINTC1_CIMR)) = (irq);
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#define mcf_disable_irq0(irq) \
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*((volatile unsigned char *) (MCFINTC0_SIMR)) = (irq);
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#define mcf_disable_irq1(irq) \
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*((volatile unsigned char *) (MCFINTC1_SIMR)) = (irq);
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/*
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* Define the Cache register flags.
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*/
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@ -62,6 +62,11 @@ void __init init_IRQ(void)
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init_vectors();
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/* Mask all interrupt sources */
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__raw_writeb(0xff, MCFINTC0_SIMR);
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if (MCFINTC1_SIMR)
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__raw_writeb(0xff, MCFINTC1_SIMR);
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for (irq = 0; (irq < NR_IRQS); irq++) {
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irq_desc[irq].status = IRQ_DISABLED;
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irq_desc[irq].action = NULL;
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