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Davinci: psc - use ioremap()
This patch modifies the psc and clock control code to use ioremap()ed registers. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This commit is contained in:
parent
1bcd38ad2d
commit
e4c822c7e9
9 changed files with 23 additions and 26 deletions
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@ -302,7 +302,6 @@ static unsigned long clk_pllclk_recalc(struct clk *clk)
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struct pll_data *pll = clk->pll_data;
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unsigned long rate = clk->rate;
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pll->base = IO_ADDRESS(pll->phys_base);
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ctrl = __raw_readl(pll->base + PLLCTL);
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rate = pll->input_rate = clk->parent->rate;
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@ -458,8 +457,17 @@ int __init davinci_clk_init(struct clk_lookup *clocks)
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clk->recalc = clk_leafclk_recalc;
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}
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if (clk->pll_data && !clk->pll_data->div_ratio_mask)
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clk->pll_data->div_ratio_mask = PLLDIV_RATIO_MASK;
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if (clk->pll_data) {
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struct pll_data *pll = clk->pll_data;
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if (!pll->div_ratio_mask)
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pll->div_ratio_mask = PLLDIV_RATIO_MASK;
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if (pll->phys_base && !pll->base) {
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pll->base = ioremap(pll->phys_base, SZ_4K);
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WARN_ON(!pll->base);
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}
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}
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if (clk->recalc)
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clk->rate = clk->recalc(clk);
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@ -1127,10 +1127,7 @@ static struct map_desc da830_io_desc[] = {
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},
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};
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static void __iomem *da830_psc_bases[] = {
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IO_ADDRESS(DA8XX_PSC0_BASE),
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IO_ADDRESS(DA8XX_PSC1_BASE),
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};
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static u32 da830_psc_bases[] = { DA8XX_PSC0_BASE, DA8XX_PSC1_BASE };
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/* Contents of JTAG ID register used to identify exact cpu type */
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static struct davinci_id da830_ids[] = {
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@ -782,10 +782,7 @@ static struct map_desc da850_io_desc[] = {
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},
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};
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static void __iomem *da850_psc_bases[] = {
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IO_ADDRESS(DA8XX_PSC0_BASE),
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IO_ADDRESS(DA8XX_PSC1_BASE),
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};
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static u32 da850_psc_bases[] = { DA8XX_PSC0_BASE, DA8XX_PSC1_BASE };
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/* Contents of JTAG ID register used to identify exact cpu type */
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static struct davinci_id da850_ids[] = {
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@ -783,9 +783,7 @@ static struct davinci_id dm355_ids[] = {
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},
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};
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static void __iomem *dm355_psc_bases[] = {
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IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE),
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};
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static u32 dm355_psc_bases[] = { DAVINCI_PWR_SLEEP_CNTRL_BASE };
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/*
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* T0_BOT: Timer 0, bottom: clockevent source for hrtimers
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@ -1002,9 +1002,7 @@ static struct davinci_id dm365_ids[] = {
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},
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};
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static void __iomem *dm365_psc_bases[] = {
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IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE),
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};
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static u32 dm365_psc_bases[] = { DAVINCI_PWR_SLEEP_CNTRL_BASE };
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static struct davinci_timer_info dm365_timer_info = {
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.timers = davinci_timer_instance,
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@ -674,9 +674,7 @@ static struct davinci_id dm644x_ids[] = {
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},
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};
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static void __iomem *dm644x_psc_bases[] = {
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IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE),
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};
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static u32 dm644x_psc_bases[] = { DAVINCI_PWR_SLEEP_CNTRL_BASE };
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/*
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* T0_BOT: Timer 0, bottom: clockevent source for hrtimers
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@ -758,9 +758,7 @@ static struct davinci_id dm646x_ids[] = {
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},
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};
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static void __iomem *dm646x_psc_bases[] = {
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IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE),
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};
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static u32 dm646x_psc_bases[] = { DAVINCI_PWR_SLEEP_CNTRL_BASE };
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/*
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* T0_BOT: Timer 0, bottom: clockevent source for hrtimers
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@ -49,7 +49,7 @@ struct davinci_soc_info {
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struct davinci_id *ids;
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unsigned long ids_num;
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struct clk_lookup *cpu_clks;
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void __iomem **psc_bases;
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u32 *psc_bases;
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unsigned long psc_bases_num;
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void __iomem *pinmux_base;
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const struct mux_config *pinmux_pins;
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@ -38,8 +38,9 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
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return 0;
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}
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psc_base = soc_info->psc_bases[ctlr];
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psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K);
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mdstat = __raw_readl(psc_base + MDSTAT + 4 * id);
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iounmap(psc_base);
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/* if clocked, state can be "Enable" or "SyncReset" */
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return mdstat & BIT(12);
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@ -59,7 +60,7 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
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return;
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}
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psc_base = soc_info->psc_bases[ctlr];
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psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K);
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mdctl = __raw_readl(psc_base + MDCTL + 4 * id);
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mdctl &= ~MDSTAT_STATE_MASK;
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@ -99,4 +100,6 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
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do {
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mdstat = __raw_readl(psc_base + MDSTAT + 4 * id);
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} while (!((mdstat & MDSTAT_STATE_MASK) == next_state));
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iounmap(psc_base);
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}
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