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ARM: kirkwood: Unbreak PCIe I/O port
The support for the 2 pcie port of the 6282 has broken i/o port by switching
*_IO_PHYS_BASE and *_IO_BUS_BASE. In fact, the patches reintroduced the same
bug solved by commit 35f029e251
.
So, I'm adding back *_IO_BUS_BASE in resource declaration and fix definition
of KIRKWOOD_PCIE1_IO_BUS_BASE. With this change, the xgi card on my t5325 is
working again.
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Acked-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
Cc: stable@kernel.org
This commit is contained in:
parent
49553c2ef8
commit
e4ff1c39ee
2 changed files with 3 additions and 3 deletions
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@ -38,7 +38,7 @@
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#define KIRKWOOD_PCIE1_IO_PHYS_BASE 0xf3000000
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#define KIRKWOOD_PCIE1_IO_VIRT_BASE 0xfef00000
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#define KIRKWOOD_PCIE1_IO_BUS_BASE 0x00000000
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#define KIRKWOOD_PCIE1_IO_BUS_BASE 0x00100000
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#define KIRKWOOD_PCIE1_IO_SIZE SZ_1M
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#define KIRKWOOD_PCIE_IO_PHYS_BASE 0xf2000000
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@ -117,7 +117,7 @@ static void __init pcie0_ioresources_init(struct pcie_port *pp)
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* IORESOURCE_IO
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*/
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pp->res[0].name = "PCIe 0 I/O Space";
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pp->res[0].start = KIRKWOOD_PCIE_IO_PHYS_BASE;
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pp->res[0].start = KIRKWOOD_PCIE_IO_BUS_BASE;
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pp->res[0].end = pp->res[0].start + KIRKWOOD_PCIE_IO_SIZE - 1;
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pp->res[0].flags = IORESOURCE_IO;
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@ -139,7 +139,7 @@ static void __init pcie1_ioresources_init(struct pcie_port *pp)
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* IORESOURCE_IO
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*/
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pp->res[0].name = "PCIe 1 I/O Space";
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pp->res[0].start = KIRKWOOD_PCIE1_IO_PHYS_BASE;
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pp->res[0].start = KIRKWOOD_PCIE1_IO_BUS_BASE;
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pp->res[0].end = pp->res[0].start + KIRKWOOD_PCIE1_IO_SIZE - 1;
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pp->res[0].flags = IORESOURCE_IO;
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