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drm/amdgpu: fix the hibernation suspend with s0ix
During system hibernation suspend still need un-gate gfx CG/PG firstly to handle HW status check before HW resource destory. Signed-off-by: Prike Liang <Prike.Liang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1 changed files with 6 additions and 2 deletions
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@ -2685,7 +2685,7 @@ static int amdgpu_device_ip_suspend_phase1(struct amdgpu_device *adev)
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{
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int i, r;
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if (adev->in_poweroff_reboot_com ||
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if (adev->in_poweroff_reboot_com || adev->in_hibernate ||
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!amdgpu_acpi_is_s0ix_supported(adev) || amdgpu_in_reset(adev)) {
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amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE);
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amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE);
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@ -3766,7 +3766,11 @@ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon)
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amdgpu_fence_driver_suspend(adev);
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if (adev->in_poweroff_reboot_com ||
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/*
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* TODO: Need figure out the each GNB IP idle off dependency and then
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* improve the AMDGPU suspend/resume sequence for system-wide Sx entry/exit.
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*/
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if (adev->in_poweroff_reboot_com || adev->in_hibernate ||
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!amdgpu_acpi_is_s0ix_supported(adev) || amdgpu_in_reset(adev))
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r = amdgpu_device_ip_suspend_phase2(adev);
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else
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