dmaengine: dw-edma: Change rg_region to reg_base in struct dw_edma_chip

struct dw_edma_region rg_region included virtual address, physical address
and size information. But only the virtual address is used by EDMA driver.
Change it to void __iomem *reg_base to clean up code.

Link: https://lore.kernel.org/r/20220524152159.2370739-4-Frank.Li@nxp.com
Tested-by: Serge Semin <fancer.lancer@gmail.com>
Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-By: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Frank Li 2022-05-24 10:21:54 -05:00 committed by Bjorn Helgaas
parent 2031845713
commit e51b304811
4 changed files with 7 additions and 6 deletions

View file

@ -216,8 +216,8 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev,
chip->wr_ch_cnt = vsec_data.wr_ch_cnt;
chip->rd_ch_cnt = vsec_data.rd_ch_cnt;
chip->rg_region.vaddr = pcim_iomap_table(pdev)[vsec_data.rg.bar];
if (!chip->rg_region.vaddr)
chip->reg_base = pcim_iomap_table(pdev)[vsec_data.rg.bar];
if (!chip->reg_base)
return -ENOMEM;
for (i = 0; i < chip->wr_ch_cnt; i++) {
@ -282,7 +282,7 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev,
pci_dbg(pdev, "Registers:\tBAR=%u, off=0x%.8lx, sz=0x%zx bytes, addr(v=%p)\n",
vsec_data.rg.bar, vsec_data.rg.off, vsec_data.rg.sz,
chip->rg_region.vaddr);
chip->reg_base);
for (i = 0; i < chip->wr_ch_cnt; i++) {

View file

@ -25,7 +25,7 @@ enum dw_edma_control {
static inline struct dw_edma_v0_regs __iomem *__dw_regs(struct dw_edma *dw)
{
return dw->chip->rg_region.vaddr;
return dw->chip->reg_base;
}
#define SET_32(dw, name, value) \

View file

@ -288,7 +288,7 @@ void dw_edma_v0_debugfs_on(struct dw_edma *_dw)
if (!dw)
return;
regs = dw->chip->rg_region.vaddr;
regs = dw->chip->reg_base;
if (!regs)
return;

View file

@ -39,6 +39,7 @@ enum dw_edma_map_format {
* @id: instance ID
* @nr_irqs: total number of DMA IRQs
* @ops DMA channel to IRQ number mapping
* @reg_base DMA register base address
* @wr_ch_cnt DMA write channel number
* @rd_ch_cnt DMA read channel number
* @rg_region DMA register region
@ -55,7 +56,7 @@ struct dw_edma_chip {
int nr_irqs;
const struct dw_edma_core_ops *ops;
struct dw_edma_region rg_region;
void __iomem *reg_base;
u16 wr_ch_cnt;
u16 rd_ch_cnt;