platform-drivers-x86 for v6.7-6
Fixes: - Intel PMC GBE LTR regression - P2SB / PCI deadlock fix The following is an automated shortlog grouped by driver: intel/pmc: - Add suspend callback - Allow reenabling LTRs - Move GBE LTR ignore to suspend callback p2sb: - Allow p2sb_bar() calls during PCI device probe -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQSCSUwRdwTNL2MhaBlZrE9hU+XOMQUCZY7u1gAKCRBZrE9hU+XO MecEAP0eeRD/I4O3LoHgrifn0qoUgTO6SgmbZMscUTjesPsRbwD/YL2QP6LZ9qD5 8rF19nUifgLwFdj74WmcltjMPYJbDQo= =oSp6 -----END PGP SIGNATURE----- Merge tag 'platform-drivers-x86-v6.7-6' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86 Pull x86 platform driver fixes from Ilpo Järvinen: - Intel PMC GBE LTR regression - P2SB / PCI deadlock fix * tag 'platform-drivers-x86-v6.7-6' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86: platform/x86/intel/pmc: Move GBE LTR ignore to suspend callback platform/x86/intel/pmc: Allow reenabling LTRs platform/x86/intel/pmc: Add suspend callback platform/x86: p2sb: Allow p2sb_bar() calls during PCI device probe
This commit is contained in:
Linus Torvalds
commit
e543d0b5ec
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@ -314,16 +314,13 @@ int adl_core_init(struct pmc_dev *pmcdev)
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struct pmc *pmc = pmcdev->pmcs[PMC_IDX_MAIN];
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int ret;
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pmcdev->suspend = cnl_suspend;
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pmcdev->resume = cnl_resume;
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pmc->map = &adl_reg_map;
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ret = get_primary_reg_base(pmc);
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if (ret)
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return ret;
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/* Due to a hardware limitation, the GBE LTR blocks PC10
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* when a cable is attached. Tell the PMC to ignore it.
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*/
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dev_dbg(&pmcdev->pdev->dev, "ignoring GBE LTR\n");
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pmc_core_send_ltr_ignore(pmcdev, 3);
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return 0;
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}
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@ -204,21 +204,35 @@ const struct pmc_reg_map cnp_reg_map = {
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.etr3_offset = ETR3_OFFSET,
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};
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void cnl_suspend(struct pmc_dev *pmcdev)
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{
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/*
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* Due to a hardware limitation, the GBE LTR blocks PC10
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* when a cable is attached. To unblock PC10 during suspend,
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* tell the PMC to ignore it.
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*/
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pmc_core_send_ltr_ignore(pmcdev, 3, 1);
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}
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int cnl_resume(struct pmc_dev *pmcdev)
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{
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pmc_core_send_ltr_ignore(pmcdev, 3, 0);
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return pmc_core_resume_common(pmcdev);
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}
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int cnp_core_init(struct pmc_dev *pmcdev)
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{
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struct pmc *pmc = pmcdev->pmcs[PMC_IDX_MAIN];
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int ret;
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pmcdev->suspend = cnl_suspend;
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pmcdev->resume = cnl_resume;
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pmc->map = &cnp_reg_map;
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ret = get_primary_reg_base(pmc);
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if (ret)
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return ret;
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/* Due to a hardware limitation, the GBE LTR blocks PC10
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* when a cable is attached. Tell the PMC to ignore it.
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*/
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dev_dbg(&pmcdev->pdev->dev, "ignoring GBE LTR\n");
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pmc_core_send_ltr_ignore(pmcdev, 3);
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return 0;
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}
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@ -460,7 +460,7 @@ out_unlock:
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}
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DEFINE_SHOW_ATTRIBUTE(pmc_core_pll);
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int pmc_core_send_ltr_ignore(struct pmc_dev *pmcdev, u32 value)
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int pmc_core_send_ltr_ignore(struct pmc_dev *pmcdev, u32 value, int ignore)
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{
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struct pmc *pmc;
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const struct pmc_reg_map *map;
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@ -498,7 +498,10 @@ int pmc_core_send_ltr_ignore(struct pmc_dev *pmcdev, u32 value)
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mutex_lock(&pmcdev->lock);
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reg = pmc_core_reg_read(pmc, map->ltr_ignore_offset);
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reg |= BIT(ltr_index);
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if (ignore)
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reg |= BIT(ltr_index);
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else
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reg &= ~BIT(ltr_index);
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pmc_core_reg_write(pmc, map->ltr_ignore_offset, reg);
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mutex_unlock(&pmcdev->lock);
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@ -521,7 +524,7 @@ static ssize_t pmc_core_ltr_ignore_write(struct file *file,
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if (err)
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return err;
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err = pmc_core_send_ltr_ignore(pmcdev, value);
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err = pmc_core_send_ltr_ignore(pmcdev, value, 1);
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return err == 0 ? count : err;
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}
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@ -1279,6 +1282,9 @@ static __maybe_unused int pmc_core_suspend(struct device *dev)
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struct pmc_dev *pmcdev = dev_get_drvdata(dev);
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struct pmc *pmc = pmcdev->pmcs[PMC_IDX_MAIN];
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if (pmcdev->suspend)
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pmcdev->suspend(pmcdev);
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/* Check if the syspend will actually use S0ix */
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if (pm_suspend_via_firmware())
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return 0;
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@ -363,6 +363,7 @@ struct pmc {
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* @s0ix_counter: S0ix residency (step adjusted)
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* @num_lpm_modes: Count of enabled modes
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* @lpm_en_modes: Array of enabled modes from lowest to highest priority
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* @suspend: Function to perform platform specific suspend
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* @resume: Function to perform platform specific resume
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*
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* pmc_dev contains info about power management controller device.
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@ -379,6 +380,7 @@ struct pmc_dev {
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u64 s0ix_counter;
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int num_lpm_modes;
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int lpm_en_modes[LPM_MAX_NUM_MODES];
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void (*suspend)(struct pmc_dev *pmcdev);
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int (*resume)(struct pmc_dev *pmcdev);
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bool has_die_c6;
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@ -486,7 +488,7 @@ extern const struct pmc_bit_map *mtl_ioem_lpm_maps[];
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extern const struct pmc_reg_map mtl_ioem_reg_map;
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extern void pmc_core_get_tgl_lpm_reqs(struct platform_device *pdev);
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extern int pmc_core_send_ltr_ignore(struct pmc_dev *pmcdev, u32 value);
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int pmc_core_send_ltr_ignore(struct pmc_dev *pmcdev, u32 value, int ignore);
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int pmc_core_resume_common(struct pmc_dev *pmcdev);
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int get_primary_reg_base(struct pmc *pmc);
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@ -500,6 +502,9 @@ int tgl_core_init(struct pmc_dev *pmcdev);
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int adl_core_init(struct pmc_dev *pmcdev);
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int mtl_core_init(struct pmc_dev *pmcdev);
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void cnl_suspend(struct pmc_dev *pmcdev);
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int cnl_resume(struct pmc_dev *pmcdev);
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#define pmc_for_each_mode(i, mode, pmcdev) \
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for (i = 0, mode = pmcdev->lpm_en_modes[i]; \
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i < pmcdev->num_lpm_modes; \
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@ -979,6 +979,8 @@ static void mtl_d3_fixup(void)
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static int mtl_resume(struct pmc_dev *pmcdev)
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{
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mtl_d3_fixup();
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pmc_core_send_ltr_ignore(pmcdev, 3, 0);
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return pmc_core_resume_common(pmcdev);
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}
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@ -989,6 +991,7 @@ int mtl_core_init(struct pmc_dev *pmcdev)
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mtl_d3_fixup();
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pmcdev->suspend = cnl_suspend;
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pmcdev->resume = mtl_resume;
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pmcdev->regmap_list = mtl_pmc_info_list;
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@ -1002,11 +1005,5 @@ int mtl_core_init(struct pmc_dev *pmcdev)
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return ret;
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}
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/* Due to a hardware limitation, the GBE LTR blocks PC10
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* when a cable is attached. Tell the PMC to ignore it.
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*/
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dev_dbg(&pmcdev->pdev->dev, "ignoring GBE LTR\n");
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pmc_core_send_ltr_ignore(pmcdev, 3);
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return 0;
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}
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@ -259,16 +259,15 @@ int tgl_core_init(struct pmc_dev *pmcdev)
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int ret;
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pmc->map = &tgl_reg_map;
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pmcdev->suspend = cnl_suspend;
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pmcdev->resume = cnl_resume;
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ret = get_primary_reg_base(pmc);
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if (ret)
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return ret;
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pmc_core_get_tgl_lpm_reqs(pmcdev->pdev);
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/* Due to a hardware limitation, the GBE LTR blocks PC10
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* when a cable is attached. Tell the PMC to ignore it.
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*/
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dev_dbg(&pmcdev->pdev->dev, "ignoring GBE LTR\n");
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pmc_core_send_ltr_ignore(pmcdev, 3);
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return 0;
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}
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@ -26,6 +26,21 @@ static const struct x86_cpu_id p2sb_cpu_ids[] = {
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{}
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};
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/*
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* Cache BAR0 of P2SB device functions 0 to 7.
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* TODO: The constant 8 is the number of functions that PCI specification
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* defines. Same definitions exist tree-wide. Unify this definition and
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* the other definitions then move to include/uapi/linux/pci.h.
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*/
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#define NR_P2SB_RES_CACHE 8
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struct p2sb_res_cache {
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u32 bus_dev_id;
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struct resource res;
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};
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static struct p2sb_res_cache p2sb_resources[NR_P2SB_RES_CACHE];
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static int p2sb_get_devfn(unsigned int *devfn)
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{
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unsigned int fn = P2SB_DEVFN_DEFAULT;
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@ -39,8 +54,16 @@ static int p2sb_get_devfn(unsigned int *devfn)
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return 0;
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}
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static bool p2sb_valid_resource(struct resource *res)
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{
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if (res->flags)
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return true;
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return false;
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}
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/* Copy resource from the first BAR of the device in question */
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static int p2sb_read_bar0(struct pci_dev *pdev, struct resource *mem)
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static void p2sb_read_bar0(struct pci_dev *pdev, struct resource *mem)
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{
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struct resource *bar0 = &pdev->resource[0];
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@ -56,47 +79,64 @@ static int p2sb_read_bar0(struct pci_dev *pdev, struct resource *mem)
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mem->end = bar0->end;
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mem->flags = bar0->flags;
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mem->desc = bar0->desc;
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}
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static void p2sb_scan_and_cache_devfn(struct pci_bus *bus, unsigned int devfn)
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{
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struct p2sb_res_cache *cache = &p2sb_resources[PCI_FUNC(devfn)];
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struct pci_dev *pdev;
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pdev = pci_scan_single_device(bus, devfn);
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if (!pdev)
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return;
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p2sb_read_bar0(pdev, &cache->res);
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cache->bus_dev_id = bus->dev.id;
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pci_stop_and_remove_bus_device(pdev);
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return;
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}
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static int p2sb_scan_and_cache(struct pci_bus *bus, unsigned int devfn)
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{
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unsigned int slot, fn;
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if (PCI_FUNC(devfn) == 0) {
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/*
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* When function number of the P2SB device is zero, scan it and
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* other function numbers, and if devices are available, cache
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* their BAR0s.
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*/
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slot = PCI_SLOT(devfn);
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for (fn = 0; fn < NR_P2SB_RES_CACHE; fn++)
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p2sb_scan_and_cache_devfn(bus, PCI_DEVFN(slot, fn));
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} else {
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/* Scan the P2SB device and cache its BAR0 */
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p2sb_scan_and_cache_devfn(bus, devfn);
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}
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if (!p2sb_valid_resource(&p2sb_resources[PCI_FUNC(devfn)].res))
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return -ENOENT;
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return 0;
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}
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static int p2sb_scan_and_read(struct pci_bus *bus, unsigned int devfn, struct resource *mem)
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static struct pci_bus *p2sb_get_bus(struct pci_bus *bus)
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{
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struct pci_dev *pdev;
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int ret;
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static struct pci_bus *p2sb_bus;
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pdev = pci_scan_single_device(bus, devfn);
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if (!pdev)
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return -ENODEV;
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bus = bus ?: p2sb_bus;
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if (bus)
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return bus;
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ret = p2sb_read_bar0(pdev, mem);
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pci_stop_and_remove_bus_device(pdev);
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return ret;
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/* Assume P2SB is on the bus 0 in domain 0 */
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p2sb_bus = pci_find_bus(0, 0);
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return p2sb_bus;
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}
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/**
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* p2sb_bar - Get Primary to Sideband (P2SB) bridge device BAR
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* @bus: PCI bus to communicate with
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* @devfn: PCI slot and function to communicate with
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* @mem: memory resource to be filled in
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*
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* The BIOS prevents the P2SB device from being enumerated by the PCI
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* subsystem, so we need to unhide and hide it back to lookup the BAR.
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*
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* if @bus is NULL, the bus 0 in domain 0 will be used.
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* If @devfn is 0, it will be replaced by devfn of the P2SB device.
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*
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* Caller must provide a valid pointer to @mem.
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*
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* Locking is handled by pci_rescan_remove_lock mutex.
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*
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* Return:
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* 0 on success or appropriate errno value on error.
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*/
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int p2sb_bar(struct pci_bus *bus, unsigned int devfn, struct resource *mem)
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static int p2sb_cache_resources(void)
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{
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struct pci_dev *pdev_p2sb;
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struct pci_bus *bus;
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unsigned int devfn_p2sb;
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u32 value = P2SBC_HIDE;
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int ret;
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@ -106,8 +146,9 @@ int p2sb_bar(struct pci_bus *bus, unsigned int devfn, struct resource *mem)
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if (ret)
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return ret;
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/* if @bus is NULL, use bus 0 in domain 0 */
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bus = bus ?: pci_find_bus(0, 0);
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bus = p2sb_get_bus(NULL);
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if (!bus)
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return -ENODEV;
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/*
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* Prevent concurrent PCI bus scan from seeing the P2SB device and
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@ -115,17 +156,16 @@ int p2sb_bar(struct pci_bus *bus, unsigned int devfn, struct resource *mem)
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*/
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pci_lock_rescan_remove();
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/* Unhide the P2SB device, if needed */
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/*
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* The BIOS prevents the P2SB device from being enumerated by the PCI
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* subsystem, so we need to unhide and hide it back to lookup the BAR.
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* Unhide the P2SB device here, if needed.
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*/
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pci_bus_read_config_dword(bus, devfn_p2sb, P2SBC, &value);
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if (value & P2SBC_HIDE)
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pci_bus_write_config_dword(bus, devfn_p2sb, P2SBC, 0);
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pdev_p2sb = pci_scan_single_device(bus, devfn_p2sb);
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if (devfn)
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ret = p2sb_scan_and_read(bus, devfn, mem);
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else
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ret = p2sb_read_bar0(pdev_p2sb, mem);
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pci_stop_and_remove_bus_device(pdev_p2sb);
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ret = p2sb_scan_and_cache(bus, devfn_p2sb);
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/* Hide the P2SB device, if it was hidden */
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if (value & P2SBC_HIDE)
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@ -133,12 +173,62 @@ int p2sb_bar(struct pci_bus *bus, unsigned int devfn, struct resource *mem)
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pci_unlock_rescan_remove();
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if (ret)
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return ret;
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return ret;
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}
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if (mem->flags == 0)
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/**
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* p2sb_bar - Get Primary to Sideband (P2SB) bridge device BAR
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* @bus: PCI bus to communicate with
|
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* @devfn: PCI slot and function to communicate with
|
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* @mem: memory resource to be filled in
|
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*
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* If @bus is NULL, the bus 0 in domain 0 will be used.
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* If @devfn is 0, it will be replaced by devfn of the P2SB device.
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*
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* Caller must provide a valid pointer to @mem.
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*
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* Return:
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* 0 on success or appropriate errno value on error.
|
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*/
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int p2sb_bar(struct pci_bus *bus, unsigned int devfn, struct resource *mem)
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{
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struct p2sb_res_cache *cache;
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int ret;
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bus = p2sb_get_bus(bus);
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if (!bus)
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return -ENODEV;
|
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if (!devfn) {
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ret = p2sb_get_devfn(&devfn);
|
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if (ret)
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return ret;
|
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}
|
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cache = &p2sb_resources[PCI_FUNC(devfn)];
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if (cache->bus_dev_id != bus->dev.id)
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return -ENODEV;
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|
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if (!p2sb_valid_resource(&cache->res))
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return -ENOENT;
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memcpy(mem, &cache->res, sizeof(*mem));
|
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return 0;
|
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}
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EXPORT_SYMBOL_GPL(p2sb_bar);
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|
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static int __init p2sb_fs_init(void)
|
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{
|
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p2sb_cache_resources();
|
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return 0;
|
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}
|
||||
|
||||
/*
|
||||
* pci_rescan_remove_lock to avoid access to unhidden P2SB devices can
|
||||
* not be locked in sysfs pci bus rescan path because of deadlock. To
|
||||
* avoid the deadlock, access to P2SB devices with the lock at an early
|
||||
* step in kernel initialization and cache required resources. This
|
||||
* should happen after subsys_initcall which initializes PCI subsystem
|
||||
* and before device_initcall which requires P2SB resources.
|
||||
*/
|
||||
fs_initcall(p2sb_fs_init);
|
||||
|
|
|
|||
Loading…
Reference in New Issue