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MIPS: Netlogic: XLP2xx update for I2C controller
XLP2xx has a new I2C controller which has 4 buses connected to it. Update the IO offset and IRQ mapping code to reflect this. Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com> Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5707/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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3 changed files with 21 additions and 7 deletions
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@ -88,6 +88,9 @@
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#define XLP_IO_I2C0_OFFSET(node) XLP_HDR_OFFSET(node, 0, 6, 2)
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#define XLP_IO_I2C0_OFFSET(node) XLP_HDR_OFFSET(node, 0, 6, 2)
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#define XLP_IO_I2C1_OFFSET(node) XLP_HDR_OFFSET(node, 0, 6, 3)
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#define XLP_IO_I2C1_OFFSET(node) XLP_HDR_OFFSET(node, 0, 6, 3)
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#define XLP_IO_GPIO_OFFSET(node) XLP_HDR_OFFSET(node, 0, 6, 4)
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#define XLP_IO_GPIO_OFFSET(node) XLP_HDR_OFFSET(node, 0, 6, 4)
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/* on 2XX, all I2C busses are on the same block */
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#define XLP2XX_IO_I2C_OFFSET(node) XLP_HDR_OFFSET(node, 0, 6, 7)
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/* system management */
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/* system management */
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#define XLP_IO_SYS_OFFSET(node) XLP_HDR_OFFSET(node, 0, 6, 5)
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#define XLP_IO_SYS_OFFSET(node) XLP_HDR_OFFSET(node, 0, 6, 5)
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#define XLP_IO_JTAG_OFFSET(node) XLP_HDR_OFFSET(node, 0, 6, 6)
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#define XLP_IO_JTAG_OFFSET(node) XLP_HDR_OFFSET(node, 0, 6, 6)
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@ -50,6 +50,8 @@
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#define PIC_MMC_IRQ 29
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#define PIC_MMC_IRQ 29
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#define PIC_I2C_0_IRQ 30
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#define PIC_I2C_0_IRQ 30
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#define PIC_I2C_1_IRQ 31
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#define PIC_I2C_1_IRQ 31
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#define PIC_I2C_2_IRQ 32
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#define PIC_I2C_3_IRQ 33
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#ifndef __ASSEMBLY__
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#ifndef __ASSEMBLY__
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@ -93,11 +93,14 @@ int nlm_irq_to_irt(int irq)
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case PIC_MMC_IRQ:
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case PIC_MMC_IRQ:
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devoff = XLP_IO_SD_OFFSET(0);
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devoff = XLP_IO_SD_OFFSET(0);
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break;
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break;
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case PIC_I2C_0_IRQ:
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case PIC_I2C_0_IRQ: /* I2C will be fixed up */
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devoff = XLP_IO_I2C0_OFFSET(0);
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break;
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case PIC_I2C_1_IRQ:
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case PIC_I2C_1_IRQ:
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devoff = XLP_IO_I2C1_OFFSET(0);
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case PIC_I2C_2_IRQ:
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case PIC_I2C_3_IRQ:
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if (cpu_is_xlpii())
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devoff = XLP2XX_IO_I2C_OFFSET(0);
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else
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devoff = XLP_IO_I2C0_OFFSET(0);
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break;
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break;
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default:
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default:
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devoff = 0;
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devoff = 0;
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@ -107,9 +110,15 @@ int nlm_irq_to_irt(int irq)
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if (devoff != 0) {
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if (devoff != 0) {
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pcibase = nlm_pcicfg_base(devoff);
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pcibase = nlm_pcicfg_base(devoff);
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irt = nlm_read_reg(pcibase, XLP_PCI_IRTINFO_REG) & 0xffff;
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irt = nlm_read_reg(pcibase, XLP_PCI_IRTINFO_REG) & 0xffff;
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/* HW bug, I2C 1 irt entry is off by one */
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/* HW weirdness, I2C IRT entry has to be fixed up */
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if (irq == PIC_I2C_1_IRQ)
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switch (irq) {
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irt = irt + 1;
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case PIC_I2C_1_IRQ:
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irt = irt + 1; break;
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case PIC_I2C_2_IRQ:
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irt = irt + 2; break;
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case PIC_I2C_3_IRQ:
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irt = irt + 3; break;
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}
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} else if (irq >= PIC_PCIE_LINK_0_IRQ && irq <= PIC_PCIE_LINK_3_IRQ) {
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} else if (irq >= PIC_PCIE_LINK_0_IRQ && irq <= PIC_PCIE_LINK_3_IRQ) {
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/* HW bug, PCI IRT entries are bad on early silicon, fix */
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/* HW bug, PCI IRT entries are bad on early silicon, fix */
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irt = PIC_IRT_PCIE_LINK_INDEX(irq - PIC_PCIE_LINK_0_IRQ);
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irt = PIC_IRT_PCIE_LINK_INDEX(irq - PIC_PCIE_LINK_0_IRQ);
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