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media: platform: rzg2l-cru: rzg2l-csi2: Enclose the macro in parentheses

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Fix the below error reported by checkpatch:

ERROR: Macros with complex values should be enclosed in parentheses
					CSIDPHYSKW0_UTIL_DL1_SKW_ADJ(1) | \
					CSIDPHYSKW0_UTIL_DL2_SKW_ADJ(1) | \
					CSIDPHYSKW0_UTIL_DL3_SKW_ADJ(1)

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
This commit is contained in:
Lad Prabhakar 2022-11-23 10:50:22 +00:00 committed by Hans Verkuil
parent e740d199cf
commit e5f29bb9c4
1 changed files with 4 additions and 4 deletions
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8
drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c
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@ -81,10 +81,10 @@
#define CSIDPHYSKW0_UTIL_DL1_SKW_ADJ(x) (((x) & 0x3) << 4)
#define CSIDPHYSKW0_UTIL_DL2_SKW_ADJ(x) (((x) & 0x3) << 8)
#define CSIDPHYSKW0_UTIL_DL3_SKW_ADJ(x) (((x) & 0x3) << 12)
#define CSIDPHYSKW0_DEFAULT_SKW CSIDPHYSKW0_UTIL_DL0_SKW_ADJ(1) | \
CSIDPHYSKW0_UTIL_DL1_SKW_ADJ(1) | \
CSIDPHYSKW0_UTIL_DL2_SKW_ADJ(1) | \
CSIDPHYSKW0_UTIL_DL3_SKW_ADJ(1)
#define CSIDPHYSKW0_DEFAULT_SKW (CSIDPHYSKW0_UTIL_DL0_SKW_ADJ(1) | \
CSIDPHYSKW0_UTIL_DL1_SKW_ADJ(1) | \
CSIDPHYSKW0_UTIL_DL2_SKW_ADJ(1) | \
CSIDPHYSKW0_UTIL_DL3_SKW_ADJ(1))
#define VSRSTS_RETRIES 20