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x86/ioremap: Fix page aligned size calculation in __ioremap_caller()
[ Upstream commit4dbd6a3e90
] Current code re-calculates the size after aligning the starting and ending physical addresses on a page boundary. But the re-calculation also embeds the masking of high order bits that exceed the size of the physical address space (via PHYSICAL_PAGE_MASK). If the masking removes any high order bits, the size calculation results in a huge value that is likely to immediately fail. Fix this by re-calculating the page-aligned size first. Then mask any high order bits using PHYSICAL_PAGE_MASK. Fixes:ffa71f33a8
("x86, ioremap: Fix incorrect physical address handling in PAE mode") Signed-off-by: Michael Kelley <mikelley@microsoft.com> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Dave Hansen <dave.hansen@linux.intel.com> Cc: <stable@kernel.org> Link: https://lore.kernel.org/r/1668624097-14884-2-git-send-email-mikelley@microsoft.com Signed-off-by: Sasha Levin <sashal@kernel.org>
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1 changed files with 7 additions and 1 deletions
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@ -214,9 +214,15 @@ __ioremap_caller(resource_size_t phys_addr, unsigned long size,
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* Mappings have to be page-aligned
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* Mappings have to be page-aligned
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*/
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*/
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offset = phys_addr & ~PAGE_MASK;
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offset = phys_addr & ~PAGE_MASK;
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phys_addr &= PHYSICAL_PAGE_MASK;
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phys_addr &= PAGE_MASK;
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size = PAGE_ALIGN(last_addr+1) - phys_addr;
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size = PAGE_ALIGN(last_addr+1) - phys_addr;
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/*
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* Mask out any bits not part of the actual physical
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* address, like memory encryption bits.
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*/
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phys_addr &= PHYSICAL_PAGE_MASK;
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retval = reserve_memtype(phys_addr, (u64)phys_addr + size,
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retval = reserve_memtype(phys_addr, (u64)phys_addr + size,
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pcm, &new_pcm);
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pcm, &new_pcm);
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if (retval) {
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if (retval) {
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