mirrors/linux-stable
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git synced 2024-10-03 23:58:05 +00:00
Code Issues Releases Wiki Activity

Fixes of dwmmc tuning clocks that may make probing HS cards fail,

Browse source 
adding the grf-vio clock to the edp so that it can also be build
 as module, correct pcie ep-gpio on the sapphire board and finally
 a fix that makes the gmac work at gigabit speeds on the rk3328-rock64.
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlqHdkUQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgVVtCACHTxf9/v7UFuXMDtcYRVKZaxwGe9U06RlU
 CNRLJADT300B+feHRyh2WiJvNOX4ZJeDotYkXBe/73xMp9AeLv1gTwQBQD1juAfr
 wZIXl5/P0zYFQV95oPgHOAGj89rMgvuHFGe2loO2GtIoAiZTcjNUel1SwUCNVzQL
 OVei4Z0EGx0Nk5lEFChY0pSg0cZzDko+NGSYYPeQ1qtLJffuOZAq9tG0eJAlUted
 qSCXKJnxy5cZ8FxLeuJmP2xGjiZMYLg20kr5DevRnpQTDCCP73VPIPv0IqO+YtfB
 5Cmtf8cy/GNxcG1sgK1RMW6ytP+kmBX74I6xtpUAQtaQy1Ah4jDN
 =QsKz
 -----END PGP SIGNATURE-----

Merge tag 'v4.16-rockchip-dts64fixes-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into fixes

Pull "Rockchip dts64 fixes for 4.16" from Heiko Stübner:

Fixes of dwmmc tuning clocks that may make probing HS cards fail,
adding the grf-vio clock to the edp so that it can also be build
as module, correct pcie ep-gpio on the sapphire board and finally
a fix that makes the gmac work at gigabit speeds on the rk3328-rock64.

* tag 'v4.16-rockchip-dts64fixes-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: Fix DWMMC clocks
  arm64: dts: rockchip: introduce pclk_vio_grf in rk3399-eDP device node
  arm64: dts: rockchip: correct ep-gpios for rk3399-sapphire
  arm64: dts: rockchip: fix rock64 gmac2io stability issues
This commit is contained in:
Arnd Bergmann 2018-02-22 17:47:09 +01:00
commit e6d210180a
5 changed files with 10 additions and 11 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

7
arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
View file

@ -132,17 +132,16 @@ &gmac2io {
assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
clock_in_out = "input";
/* shows instability at 1GBit right now */
max-speed = <100>;
phy-supply = <&vcc_io>;
phy-mode = "rgmii";
pinctrl-names = "default";
pinctrl-0 = <&rgmiim1_pins>;
snps,force_thresh_dma_mode;
snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 50000>;
tx_delay = <0x26>;
rx_delay = <0x11>;
tx_delay = <0x24>;
rx_delay = <0x18>;
status = "okay";
};

6
arch/arm64/boot/dts/rockchip/rk3328.dtsi
View file

@ -730,7 +730,7 @@ sdmmc: dwmmc@ff500000 {
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
status = "disabled";
};
@ -741,7 +741,7 @@ sdio: dwmmc@ff510000 {
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
<&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
status = "disabled";
};
@ -752,7 +752,7 @@ emmc: dwmmc@ff520000 {
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
status = "disabled";
};

2
arch/arm64/boot/dts/rockchip/rk3368.dtsi
View file

@ -257,7 +257,7 @@ sdio0: dwmmc@ff0d0000 {
max-frequency = <150000000>;
clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>,
<&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>;
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
resets = <&cru SRST_SDIO0>;

2
arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
View file

@ -457,7 +457,7 @@ &pcie0 {
assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
assigned-clock-rates = <100000000>;
ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
num-lanes = <4>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_clkreqn_cpm>;

4
arch/arm64/boot/dts/rockchip/rk3399.dtsi
View file

@ -1739,8 +1739,8 @@ edp: edp@ff970000 {
compatible = "rockchip,rk3399-edp";
reg = <0x0 0xff970000 0x0 0x8000>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_EDP>, <&cru PCLK_EDP_CTRL>;
clock-names = "dp", "pclk";
clocks = <&cru PCLK_EDP>, <&cru PCLK_EDP_CTRL>, <&cru PCLK_VIO_GRF>;
clock-names = "dp", "pclk", "grf";
pinctrl-names = "default";
pinctrl-0 = <&edp_hpd>;
power-domains = <&power RK3399_PD_EDP>;