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MIPS: tlb-r4k: If there are wired entries, don't use TLBINVF
When adding a wired entry to the TLB via add_wired_entry, the tlb is flushed with local_flush_tlb_all, which on CPUs with TLBINV results in the new wired entry being flushed again. Behavior of the TLBINV instruction applies to all applicable TLB entries and is unaffected by the setting of the Wired register. Therefore if the TLB has any wired entries, fall back to iterating over the entries rather than blasting them all using TLBINVF. Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Ohad Ben-Cohen <ohad@wizery.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: lisa.parratt@imgtec.com Cc: Hugh Dickins <hughd@google.com> Cc: Huacai Chen <chenhc@lemote.com> Cc: David S. Miller <davem@davemloft.net> Cc: James Hogan <james.hogan@imgtec.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: linux-mips@linux-mips.org Cc: linux-remoteproc@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/14283/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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1 changed files with 5 additions and 2 deletions
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@ -67,8 +67,11 @@ void local_flush_tlb_all(void)
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entry = read_c0_wired();
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/* Blast 'em all away. */
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if (cpu_has_tlbinv) {
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/*
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* Blast 'em all away.
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* If there are any wired entries, fall back to iterating
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*/
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if (cpu_has_tlbinv && !entry) {
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if (current_cpu_data.tlbsizevtlb) {
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write_c0_index(0);
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mtc0_tlbw_hazard();
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