nds32: Build infrastructure
This patch adds Makefile, Kconfig and vmlinux.lds.S files required for building an nds32 kernel. Signed-off-by: Vincent Chen <vincentc@andestech.com> Signed-off-by: Greentime Hu <greentime@andestech.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Greentime Hu
parent
a06d4298d4
commit
e71ea3bada
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#
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# For a description of the syntax of this configuration file,
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# see Documentation/kbuild/kconfig-language.txt.
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#
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config NDS32
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def_bool y
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select ARCH_WANT_FRAME_POINTERS if FTRACE
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select CLKSRC_MMIO
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select CLONE_BACKWARDS
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select COMMON_CLK
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select GENERIC_ATOMIC64
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select GENERIC_CPU_DEVICES
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select GENERIC_CLOCKEVENTS
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select GENERIC_IRQ_CHIP
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select GENERIC_IRQ_SHOW
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select GENERIC_STRNCPY_FROM_USER
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select GENERIC_STRNLEN_USER
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select GENERIC_TIME_VSYSCALL
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select HANDLE_DOMAIN_IRQ
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select HAVE_ARCH_TRACEHOOK
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select HAVE_DEBUG_KMEMLEAK
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select HAVE_MEMBLOCK
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select HAVE_REGS_AND_STACK_ACCESS_API
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select IRQ_DOMAIN
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select LOCKDEP_SUPPORT
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select MODULES_USE_ELF_RELA
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select OF
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select OF_EARLY_FLATTREE
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select NO_BOOTMEM
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select NO_IOPORT_MAP
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select RTC_LIB
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select THREAD_INFO_IN_TASK
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help
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Andes(nds32) Linux support.
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config GENERIC_CALIBRATE_DELAY
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def_bool y
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config GENERIC_CSUM
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def_bool y
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config GENERIC_HWEIGHT
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def_bool y
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config GENERIC_LOCKBREAK
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def_bool y
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depends on PREEMPT
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config RWSEM_GENERIC_SPINLOCK
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def_bool y
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config TRACE_IRQFLAGS_SUPPORT
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def_bool y
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config STACKTRACE_SUPPORT
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def_bool y
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config FIX_EARLYCON_MEM
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def_bool y
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config PGTABLE_LEVELS
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default 2
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source "init/Kconfig"
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menu "System Type"
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source "arch/nds32/Kconfig.cpu"
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config NR_CPUS
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int
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default 1
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config MMU
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def_bool y
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config NDS32_BUILTIN_DTB
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string "Builtin DTB"
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default ""
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help
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User can use it to specify the dts of the SoC
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endmenu
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menu "Kernel Features"
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source "kernel/Kconfig.preempt"
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source "mm/Kconfig"
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source "kernel/Kconfig.hz"
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endmenu
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menu "Executable file formats"
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source "fs/Kconfig.binfmt"
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endmenu
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source "net/Kconfig"
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source "drivers/Kconfig"
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source "fs/Kconfig"
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menu "Kernel hacking"
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source "lib/Kconfig.debug"
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endmenu
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source "security/Kconfig"
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source "crypto/Kconfig"
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source "lib/Kconfig"
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@ -0,0 +1,174 @@
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comment "Processor Features"
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config CPU_BIG_ENDIAN
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bool "Big endian"
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config CPU_LITTLE_ENDIAN
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def_bool !CPU_BIG_ENDIAN
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config HWZOL
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bool "hardware zero overhead loop support"
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depends on CPU_D10 || CPU_D15
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default n
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help
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A set of Zero-Overhead Loop mechanism is provided to reduce the
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instruction fetch and execution overhead of loop-control instructions.
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It will save 3 registers($LB, $LC, $LE) for context saving if say Y.
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You don't need to save these registers if you can make sure your user
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program doesn't use these registers.
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If unsure, say N.
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config CPU_CACHE_ALIASING
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bool "Aliasing cache"
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depends on CPU_N10 || CPU_D10 || CPU_N13 || CPU_V3
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default y
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help
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If this CPU is using VIPT data cache and its cache way size is larger
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than page size, say Y. If it is using PIPT data cache, say N.
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If unsure, say Y.
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choice
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prompt "minimum CPU type"
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default CPU_V3
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help
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The data cache of N15/D15 is implemented as PIPT and it will not cause
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the cache aliasing issue. The rest cpus(N13, N10 and D10) are
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implemented as VIPT data cache. It may cause the cache aliasing issue
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if its cache way size is larger than page size. You can specify the
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CPU type direcly or choose CPU_V3 if unsure.
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A kernel built for N10 is able to run on N15, D15, N13, N10 or D10.
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A kernel built for N15 is able to run on N15 or D15.
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A kernel built for D10 is able to run on D10 or D15.
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A kernel built for D15 is able to run on D15.
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A kernel built for N13 is able to run on N15, N13 or D15.
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config CPU_N15
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bool "AndesCore N15"
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config CPU_N13
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bool "AndesCore N13"
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select CPU_CACHE_ALIASING if ANDES_PAGE_SIZE_4KB
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config CPU_N10
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bool "AndesCore N10"
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select CPU_CACHE_ALIASING
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config CPU_D15
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bool "AndesCore D15"
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config CPU_D10
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bool "AndesCore D10"
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select CPU_CACHE_ALIASING
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config CPU_V3
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bool "AndesCore v3 compatible"
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select CPU_CACHE_ALIASING
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endchoice
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choice
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prompt "Paging -- page size "
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default ANDES_PAGE_SIZE_4KB
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config ANDES_PAGE_SIZE_4KB
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bool "use 4KB page size"
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config ANDES_PAGE_SIZE_8KB
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bool "use 8KB page size"
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endchoice
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config CPU_ICACHE_DISABLE
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bool "Disable I-Cache"
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help
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Say Y here to disable the processor instruction cache. Unless
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you have a reason not to or are unsure, say N.
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config CPU_DCACHE_DISABLE
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bool "Disable D-Cache"
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help
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Say Y here to disable the processor data cache. Unless
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you have a reason not to or are unsure, say N.
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config CPU_DCACHE_WRITETHROUGH
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bool "Force write through D-cache"
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depends on !CPU_DCACHE_DISABLE
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help
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Say Y here to use the data cache in writethrough mode. Unless you
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specifically require this or are unsure, say N.
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config WBNA
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bool "WBNA"
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default n
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help
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Say Y here to enable write-back memory with no-write-allocation policy.
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config ALIGNMENT_TRAP
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bool "Kernel support unaligned access handling by sw"
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depends on PROC_FS
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default n
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help
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Andes processors cannot load/store information which is not
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naturally aligned on the bus, i.e., a 4 byte load must start at an
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address divisible by 4. On 32-bit Andes processors, these non-aligned
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load/store instructions will be emulated in software if you say Y
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here, which has a severe performance impact. With an IP-only
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configuration it is safe to say N, otherwise say Y.
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config HW_SUPPORT_UNALIGNMENT_ACCESS
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bool "Kernel support unaligned access handling by hw"
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depends on !ALIGNMENT_TRAP
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default n
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help
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Andes processors load/store world/half-word instructions can access
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unaligned memory locations without generating the Data Alignment
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Check exceptions. With an IP-only configuration it is safe to say N,
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otherwise say Y.
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config HIGHMEM
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bool "High Memory Support"
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depends on MMU && !CPU_CACHE_ALIASING
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help
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The address space of Andes processors is only 4 Gigabytes large
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and it has to accommodate user address space, kernel address
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space as well as some memory mapped IO. That means that, if you
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have a large amount of physical memory and/or IO, not all of the
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memory can be "permanently mapped" by the kernel. The physical
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memory that is not permanently mapped is called "high memory".
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Depending on the selected kernel/user memory split, minimum
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vmalloc space and actual amount of RAM, you may not need this
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option which should result in a slightly faster kernel.
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If unsure, say N.
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config CACHE_L2
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bool "Support L2 cache"
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default y
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help
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Say Y here to enable L2 cache if your SoC are integrated with L2CC.
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If unsure, say N.
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menu "Memory configuration"
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choice
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prompt "Memory split"
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depends on MMU
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default VMSPLIT_3G_OPT
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help
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Select the desired split between kernel and user memory.
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If you are not absolutely sure what you are doing, leave this
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option alone!
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config VMSPLIT_3G
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bool "3G/1G user/kernel split"
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config VMSPLIT_3G_OPT
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bool "3G/1G user/kernel split (for full 1G low memory)"
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config VMSPLIT_2G
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bool "2G/2G user/kernel split"
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config VMSPLIT_1G
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bool "1G/3G user/kernel split"
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endchoice
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config PAGE_OFFSET
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hex
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default 0x40000000 if VMSPLIT_1G
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default 0x80000000 if VMSPLIT_2G
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default 0xB0000000 if VMSPLIT_3G_OPT
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default 0xC0000000
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endmenu
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@ -0,0 +1,66 @@
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LDFLAGS_vmlinux := --no-undefined -X
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OBJCOPYFLAGS := -O binary -R .note -R .note.gnu.build-id -R .comment -S
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KBUILD_DEFCONFIG := defconfig
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comma = ,
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KBUILD_CFLAGS +=-mno-sched-prolog-epilog -mcmodel=large
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KBUILD_CFLAGS +=$(arch-y) $(tune-y)
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KBUILD_AFLAGS +=$(arch-y) $(tune-y)
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#Default value
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head-y := arch/nds32/kernel/head.o
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textaddr-y := $(CONFIG_PAGE_OFFSET)+0xc000
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TEXTADDR := $(textaddr-y)
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export TEXTADDR
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# If we have a machine-specific directory, then include it in the build.
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core-y += arch/nds32/kernel/ arch/nds32/mm/
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libs-y += arch/nds32/lib/
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LIBGCC_PATH := \
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$(shell $(CC) $(KBUILD_CFLAGS) $(KCFLAGS) -print-libgcc-file-name)
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libs-y += $(LIBGCC_PATH)
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ifneq '$(CONFIG_NDS32_BUILTIN_DTB)' '""'
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BUILTIN_DTB := y
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else
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BUILTIN_DTB := n
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endif
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ifdef CONFIG_CPU_LITTLE_ENDIAN
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KBUILD_CFLAGS += -EL
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else
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KBUILD_CFLAGS += -EB
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endif
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boot := arch/nds32/boot
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core-$(BUILTIN_DTB) += $(boot)/dts/
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.PHONY: FORCE
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Image: vmlinux
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$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
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PHONY += vdso_install
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vdso_install:
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$(Q)$(MAKE) $(build)=arch/nds32/kernel/vdso $@
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prepare: vdso_prepare
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vdso_prepare: prepare0
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$(Q)$(MAKE) $(build)=arch/nds32/kernel/vdso include/generated/vdso-offsets.h
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CLEAN_FILES += include/asm-nds32/constants.h*
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# We use MRPROPER_FILES and CLEAN_FILES now
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archclean:
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$(Q)$(MAKE) $(clean)=$(boot)
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define archhelp
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echo ' Image - kernel image (arch/$(ARCH)/boot/Image)'
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endef
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@ -0,0 +1,15 @@
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targets := Image Image.gz
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$(obj)/Image: vmlinux FORCE
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$(call if_changed,objcopy)
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$(obj)/Image.gz: $(obj)/Image FORCE
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$(call if_changed,gzip)
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install: $(obj)/Image
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$(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
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$(obj)/Image System.map "$(INSTALL_PATH)"
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zinstall: $(obj)/Image.gz
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$(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
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$(obj)/Image.gz System.map "$(INSTALL_PATH)"
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@ -0,0 +1,55 @@
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generic-y += asm-offsets.h
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generic-y += atomic.h
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generic-y += bitops.h
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generic-y += bitsperlong.h
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generic-y += bpf_perf_event.h
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generic-y += bug.h
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generic-y += bugs.h
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generic-y += checksum.h
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generic-y += clkdev.h
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generic-y += cmpxchg.h
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generic-y += cmpxchg-local.h
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generic-y += cputime.h
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generic-y += device.h
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generic-y += div64.h
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generic-y += dma.h
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generic-y += emergency-restart.h
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generic-y += errno.h
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generic-y += exec.h
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generic-y += fb.h
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generic-y += fcntl.h
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generic-y += ftrace.h
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generic-y += gpio.h
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generic-y += hardirq.h
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generic-y += hw_irq.h
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generic-y += ioctl.h
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generic-y += ioctls.h
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generic-y += irq.h
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generic-y += irq_regs.h
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generic-y += irq_work.h
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generic-y += kdebug.h
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generic-y += kmap_types.h
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generic-y += kprobes.h
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generic-y += kvm_para.h
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generic-y += limits.h
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generic-y += local.h
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generic-y += mm-arch-hooks.h
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generic-y += mman.h
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generic-y += parport.h
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generic-y += pci.h
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generic-y += percpu.h
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generic-y += preempt.h
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generic-y += sections.h
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generic-y += segment.h
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generic-y += serial.h
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generic-y += shmbuf.h
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generic-y += sizes.h
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generic-y += stat.h
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generic-y += switch_to.h
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generic-y += timex.h
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generic-y += topology.h
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generic-y += trace_clock.h
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generic-y += unaligned.h
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generic-y += user.h
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generic-y += vga.h
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generic-y += word-at-a-time.h
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@ -0,0 +1,29 @@
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# UAPI Header export list
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include include/uapi/asm-generic/Kbuild.asm
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generic-y += bpf_perf_event.h
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generic-y += errno.h
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generic-y += ioctl.h
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generic-y += ioctls.h
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generic-y += ipcbuf.h
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generic-y += shmbuf.h
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generic-y += bitsperlong.h
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generic-y += fcntl.h
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generic-y += stat.h
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generic-y += mman.h
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generic-y += msgbuf.h
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generic-y += poll.h
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generic-y += posix_types.h
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generic-y += resource.h
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generic-y += sembuf.h
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generic-y += setup.h
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generic-y += siginfo.h
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generic-y += signal.h
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generic-y += socket.h
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generic-y += sockios.h
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generic-y += swab.h
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generic-y += statfs.h
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generic-y += termbits.h
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generic-y += termios.h
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generic-y += types.h
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generic-y += ucontext.h
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@ -0,0 +1,23 @@
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#
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# Makefile for the linux kernel.
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#
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CPPFLAGS_vmlinux.lds := -DTEXTADDR=$(TEXTADDR)
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AFLAGS_head.o := -DTEXTADDR=$(TEXTADDR)
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# Object file lists.
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obj-y := ex-entry.o ex-exit.o ex-scall.o irq.o \
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process.o ptrace.o setup.o signal.o \
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sys_nds32.o time.o traps.o cacheinfo.o \
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dma.o syscall_table.o vdso.o
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obj-$(CONFIG_MODULES) += nds32_ksyms.o module.o
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obj-$(CONFIG_STACKTRACE) += stacktrace.o
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obj-$(CONFIG_OF) += devtree.o
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obj-$(CONFIG_CACHE_L2) += atl2c.o
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extra-y := head.o vmlinux.lds
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obj-y += vdso/
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@ -0,0 +1,57 @@
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// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2005-2017 Andes Technology Corporation
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#include <asm/page.h>
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#include <asm/thread_info.h>
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#include <asm/cache.h>
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#include <asm/memory.h>
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#define LOAD_OFFSET (PAGE_OFFSET - PHYS_OFFSET)
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#include <asm-generic/vmlinux.lds.h>
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OUTPUT_ARCH(nds32)
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ENTRY(_stext_lma)
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jiffies = jiffies_64;
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SECTIONS
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{
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_stext_lma = TEXTADDR - LOAD_OFFSET;
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. = TEXTADDR;
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__init_begin = .;
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HEAD_TEXT_SECTION
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INIT_TEXT_SECTION(PAGE_SIZE)
|
||||
INIT_DATA_SECTION(16)
|
||||
PERCPU_SECTION(L1_CACHE_BYTES)
|
||||
__init_end = .;
|
||||
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
_stext = .;
|
||||
/* Real text segment */
|
||||
.text : AT(ADDR(.text) - LOAD_OFFSET) {
|
||||
_text = .; /* Text and read-only data */
|
||||
TEXT_TEXT
|
||||
SCHED_TEXT
|
||||
CPUIDLE_TEXT
|
||||
LOCK_TEXT
|
||||
KPROBES_TEXT
|
||||
IRQENTRY_TEXT
|
||||
*(.fixup)
|
||||
}
|
||||
|
||||
_etext = .; /* End of text and rodata section */
|
||||
|
||||
_sdata = .;
|
||||
RO_DATA_SECTION(PAGE_SIZE)
|
||||
RW_DATA_SECTION(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
|
||||
_edata = .;
|
||||
|
||||
EXCEPTION_TABLE(16)
|
||||
NOTES
|
||||
BSS_SECTION(4, 4, 4)
|
||||
_end = .;
|
||||
|
||||
STABS_DEBUG
|
||||
DWARF_DEBUG
|
||||
|
||||
DISCARDS
|
||||
}
|
||||
|
|
@ -0,0 +1,7 @@
|
|||
obj-y := extable.o tlb.o \
|
||||
fault.o init.o ioremap.o mmap.o \
|
||||
mm-nds32.o cacheflush.o proc.o
|
||||
|
||||
obj-$(CONFIG_ALIGNMENT_TRAP) += alignment.o
|
||||
obj-$(CONFIG_HIGHMEM) += highmem.o
|
||||
CFLAGS_proc-n13.o += -fomit-frame-pointer
|
||||
Loading…
Reference in New Issue