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pci-v4.14-fixes-5

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Merge tag 'pci-v4.14-fixes-5' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Pull PCI fixes from Bjorn Helgaas:

 - revert Tegra MSI change that caused a regression on TrimSlice
   (Thierry Reding)

 - finish Aardvark conversion to host bridge IRQ mapping. We missed
   Aardvark the first time around so it regressed (Thomas Petazzoni)

* tag 'pci-v4.14-fixes-5' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
  PCI: aardvark: Move to struct pci_host_bridge IRQ mapping functions
  Revert "PCI: tegra: Do not allocate MSI target memory"
This commit is contained in:
Linus Torvalds 2017-10-13 13:28:19 -07:00
commit e837d9134b
2 changed files with 8 additions and 16 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
drivers/pci/host/pci-aardvark.c
View file

@ -935,6 +935,8 @@ static int advk_pcie_probe(struct platform_device *pdev)
bridge->sysdata = pcie;
bridge->busnr = 0;
bridge->ops = &advk_pcie_ops;
bridge->map_irq = of_irq_parse_and_map_pci;
bridge->swizzle_irq = pci_common_swizzle;
ret = pci_scan_root_bus_bridge(bridge);
if (ret < 0) {

22
drivers/pci/host/pci-tegra.c
View file

@ -233,6 +233,7 @@ struct tegra_msi {
struct msi_controller chip;
DECLARE_BITMAP(used, INT_PCI_MSI_NR);
struct irq_domain *domain;
unsigned long pages;
struct mutex lock;
u64 phys;
int irq;
@ -1529,22 +1530,9 @@ static int tegra_pcie_enable_msi(struct tegra_pcie *pcie)
goto err;
}
/*
* The PCI host bridge on Tegra contains some logic that intercepts
* MSI writes, which means that the MSI target address doesn't have
* to point to actual physical memory. Rather than allocating one 4
* KiB page of system memory that's never used, we can simply pick
* an arbitrary address within an area reserved for system memory
* in the FPCI address map.
*
* However, in order to avoid confusion, we pick an address that
* doesn't map to physical memory. The FPCI address map reserves a
* 1012 GiB region for system memory and memory-mapped I/O. Since
* none of the Tegra SoCs that contain this PCI host bridge can
* address more than 16 GiB of system memory, the last 4 KiB of
* these 1012 GiB is a good candidate.
*/
msi->phys = 0xfcfffff000;
/* setup AFI/FPCI range */
msi->pages = __get_free_pages(GFP_KERNEL, 0);
msi->phys = virt_to_phys((void *)msi->pages);
afi_writel(pcie, msi->phys >> soc->msi_base_shift, AFI_MSI_FPCI_BAR_ST);
afi_writel(pcie, msi->phys, AFI_MSI_AXI_BAR_ST);
@ -1596,6 +1584,8 @@ static int tegra_pcie_disable_msi(struct tegra_pcie *pcie)
afi_writel(pcie, 0, AFI_MSI_EN_VEC6);
afi_writel(pcie, 0, AFI_MSI_EN_VEC7);
free_pages(msi->pages, 0);
if (msi->irq > 0)
free_irq(msi->irq, pcie);