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arm64: dts: mt8173: fix some indentation
Fix indentation nits to make mt8173.dtsi more consistent. Signed-off-by: Eddie Huang <eddie.huang@mediatek.com> Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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6769b93c08
commit
e881ad1bc6
1 changed files with 9 additions and 10 deletions
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@ -91,13 +91,13 @@ timer {
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compatible = "arm,armv8-timer";
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interrupt-parent = <&gic>;
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interrupts = <GIC_PPI 13
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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};
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soc {
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@ -131,7 +131,7 @@ syscfg_pctl_a: syscfg_pctl_a@10005000 {
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sysirq: intpol-controller@10200620 {
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compatible = "mediatek,mt8173-sysirq",
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"mediatek,mt6577-sysirq";
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"mediatek,mt6577-sysirq";
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interrupt-controller;
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#interrupt-cells = <3>;
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interrupt-parent = <&gic>;
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@ -153,7 +153,7 @@ gic: interrupt-controller@10220000 {
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uart0: serial@11002000 {
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compatible = "mediatek,mt8173-uart",
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"mediatek,mt6577-uart";
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"mediatek,mt6577-uart";
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reg = <0 0x11002000 0 0x400>;
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interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&uart_clk>;
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@ -162,7 +162,7 @@ uart0: serial@11002000 {
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uart1: serial@11003000 {
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compatible = "mediatek,mt8173-uart",
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"mediatek,mt6577-uart";
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"mediatek,mt6577-uart";
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reg = <0 0x11003000 0 0x400>;
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interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&uart_clk>;
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@ -171,7 +171,7 @@ uart1: serial@11003000 {
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uart2: serial@11004000 {
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compatible = "mediatek,mt8173-uart",
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"mediatek,mt6577-uart";
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"mediatek,mt6577-uart";
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reg = <0 0x11004000 0 0x400>;
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interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&uart_clk>;
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@ -180,13 +180,12 @@ uart2: serial@11004000 {
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uart3: serial@11005000 {
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compatible = "mediatek,mt8173-uart",
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"mediatek,mt6577-uart";
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"mediatek,mt6577-uart";
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reg = <0 0x11005000 0 0x400>;
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interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&uart_clk>;
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status = "disabled";
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};
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};
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};
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