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x86/delay: Preparatory code cleanup
The naming conventions in the delay code are confusing at best. All delay variants use a loops argument and or variable which originates from the original delay_loop() implementation. But all variants except delay_loop() are based on TSC cycles. Rename the argument to cycles and make it type u64 to avoid these weird expansions to u64 in the functions. Rename MWAITX_MAX_LOOPS to MWAITX_MAX_WAIT_CYCLES for the same reason and fixup the comment of delay_mwaitx() as well. Mark the delay_fn function pointer __ro_after_init and fixup the comment for it. No functional change and preparation for the upcoming TPAUSE based delay variant. [ Kyung Min Park: Added __init to use_tsc_delay() ] Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Kyung Min Park <kyung.min.park@intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/1587757076-30337-2-git-send-email-kyung.min.park@intel.com
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3 changed files with 27 additions and 23 deletions
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@ -3,8 +3,9 @@
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#define _ASM_X86_DELAY_H
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#define _ASM_X86_DELAY_H
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#include <asm-generic/delay.h>
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#include <asm-generic/delay.h>
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#include <linux/init.h>
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void use_tsc_delay(void);
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void __init use_tsc_delay(void);
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void use_mwaitx_delay(void);
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void use_mwaitx_delay(void);
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#endif /* _ASM_X86_DELAY_H */
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#endif /* _ASM_X86_DELAY_H */
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@ -20,7 +20,7 @@
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#define MWAIT_ECX_INTERRUPT_BREAK 0x1
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#define MWAIT_ECX_INTERRUPT_BREAK 0x1
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#define MWAITX_ECX_TIMER_ENABLE BIT(1)
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#define MWAITX_ECX_TIMER_ENABLE BIT(1)
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#define MWAITX_MAX_LOOPS ((u32)-1)
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#define MWAITX_MAX_WAIT_CYCLES UINT_MAX
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#define MWAITX_DISABLE_CSTATES 0xf0
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#define MWAITX_DISABLE_CSTATES 0xf0
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u32 get_umwait_control_msr(void);
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u32 get_umwait_control_msr(void);
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@ -27,9 +27,19 @@
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# include <asm/smp.h>
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# include <asm/smp.h>
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#endif
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#endif
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static void delay_loop(u64 __loops);
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/*
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* Calibration and selection of the delay mechanism happens only once
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* during boot.
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*/
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static void (*delay_fn)(u64) __ro_after_init = delay_loop;
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/* simple loop based delay: */
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/* simple loop based delay: */
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static void delay_loop(unsigned long loops)
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static void delay_loop(u64 __loops)
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{
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{
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unsigned long loops = (unsigned long)__loops;
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asm volatile(
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asm volatile(
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" test %0,%0 \n"
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" test %0,%0 \n"
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" jz 3f \n"
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" jz 3f \n"
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@ -49,9 +59,9 @@ static void delay_loop(unsigned long loops)
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}
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}
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/* TSC based delay: */
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/* TSC based delay: */
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static void delay_tsc(unsigned long __loops)
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static void delay_tsc(u64 cycles)
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{
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{
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u64 bclock, now, loops = __loops;
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u64 bclock, now;
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int cpu;
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int cpu;
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preempt_disable();
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preempt_disable();
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@ -59,7 +69,7 @@ static void delay_tsc(unsigned long __loops)
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bclock = rdtsc_ordered();
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bclock = rdtsc_ordered();
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for (;;) {
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for (;;) {
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now = rdtsc_ordered();
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now = rdtsc_ordered();
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if ((now - bclock) >= loops)
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if ((now - bclock) >= cycles)
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break;
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break;
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/* Allow RT tasks to run */
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/* Allow RT tasks to run */
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@ -77,7 +87,7 @@ static void delay_tsc(unsigned long __loops)
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* counter for this CPU.
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* counter for this CPU.
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*/
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*/
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if (unlikely(cpu != smp_processor_id())) {
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if (unlikely(cpu != smp_processor_id())) {
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loops -= (now - bclock);
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cycles -= (now - bclock);
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cpu = smp_processor_id();
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cpu = smp_processor_id();
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bclock = rdtsc_ordered();
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bclock = rdtsc_ordered();
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}
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}
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@ -87,24 +97,24 @@ static void delay_tsc(unsigned long __loops)
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/*
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/*
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* On some AMD platforms, MWAITX has a configurable 32-bit timer, that
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* On some AMD platforms, MWAITX has a configurable 32-bit timer, that
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* counts with TSC frequency. The input value is the loop of the
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* counts with TSC frequency. The input value is the number of TSC cycles
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* counter, it will exit when the timer expires.
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* to wait. MWAITX will also exit when the timer expires.
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*/
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*/
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static void delay_mwaitx(unsigned long __loops)
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static void delay_mwaitx(u64 cycles)
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{
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{
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u64 start, end, delay, loops = __loops;
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u64 start, end, delay;
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/*
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/*
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* Timer value of 0 causes MWAITX to wait indefinitely, unless there
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* Timer value of 0 causes MWAITX to wait indefinitely, unless there
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* is a store on the memory monitored by MONITORX.
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* is a store on the memory monitored by MONITORX.
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*/
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*/
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if (loops == 0)
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if (!cycles)
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return;
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return;
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start = rdtsc_ordered();
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start = rdtsc_ordered();
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for (;;) {
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for (;;) {
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delay = min_t(u64, MWAITX_MAX_LOOPS, loops);
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delay = min_t(u64, MWAITX_MAX_WAIT_CYCLES, cycles);
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/*
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/*
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* Use cpu_tss_rw as a cacheline-aligned, seldomly
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* Use cpu_tss_rw as a cacheline-aligned, seldomly
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@ -121,22 +131,15 @@ static void delay_mwaitx(unsigned long __loops)
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end = rdtsc_ordered();
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end = rdtsc_ordered();
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if (loops <= end - start)
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if (cycles <= end - start)
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break;
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break;
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loops -= end - start;
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cycles -= end - start;
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start = end;
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start = end;
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}
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}
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}
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}
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/*
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void __init use_tsc_delay(void)
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* Since we calibrate only once at boot, this
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* function should be set once at boot and not changed
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*/
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static void (*delay_fn)(unsigned long) = delay_loop;
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void use_tsc_delay(void)
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{
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{
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if (delay_fn == delay_loop)
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if (delay_fn == delay_loop)
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delay_fn = delay_tsc;
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delay_fn = delay_tsc;
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