Merge branch 'aspeed-mdio-c45'

Potin Lai says:

====================
mdio: aspeed: Add Clause 45 support for Aspeed MDIO

This patch series add Clause 45 support for Aspeed MDIO driver, and
separate c22 and c45 implementation into different functions.

LINK: [v1] https://lore.kernel.org/all/20220329161949.19762-1-potin.lai@quantatw.com/
LINK: [v2] https://lore.kernel.org/all/20220406170055.28516-1-potin.lai@quantatw.com/

Changes v2 --> v3:
 - sort local variable sequence in reverse Christmas tree format.

Changes v1 --> v2:
 - add C45 to probe_capabilities
 - break one patch into 3 small patches
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller 2022-04-08 12:20:52 +01:00
commit e89006be0b

View file

@ -21,6 +21,10 @@
#define ASPEED_MDIO_CTRL_OP GENMASK(27, 26)
#define MDIO_C22_OP_WRITE 0b01
#define MDIO_C22_OP_READ 0b10
#define MDIO_C45_OP_ADDR 0b00
#define MDIO_C45_OP_WRITE 0b01
#define MDIO_C45_OP_PREAD 0b10
#define MDIO_C45_OP_READ 0b11
#define ASPEED_MDIO_CTRL_PHYAD GENMASK(25, 21)
#define ASPEED_MDIO_CTRL_REGAD GENMASK(20, 16)
#define ASPEED_MDIO_CTRL_MIIWDATA GENMASK(15, 0)
@ -39,34 +43,35 @@ struct aspeed_mdio {
void __iomem *base;
};
static int aspeed_mdio_read(struct mii_bus *bus, int addr, int regnum)
static int aspeed_mdio_op(struct mii_bus *bus, u8 st, u8 op, u8 phyad, u8 regad,
u16 data)
{
struct aspeed_mdio *ctx = bus->priv;
u32 ctrl;
u32 data;
int rc;
dev_dbg(&bus->dev, "%s: addr: %d, regnum: %d\n", __func__, addr,
regnum);
/* Just clause 22 for the moment */
if (regnum & MII_ADDR_C45)
return -EOPNOTSUPP;
dev_dbg(&bus->dev, "%s: st: %u op: %u, phyad: %u, regad: %u, data: %u\n",
__func__, st, op, phyad, regad, data);
ctrl = ASPEED_MDIO_CTRL_FIRE
| FIELD_PREP(ASPEED_MDIO_CTRL_ST, ASPEED_MDIO_CTRL_ST_C22)
| FIELD_PREP(ASPEED_MDIO_CTRL_OP, MDIO_C22_OP_READ)
| FIELD_PREP(ASPEED_MDIO_CTRL_PHYAD, addr)
| FIELD_PREP(ASPEED_MDIO_CTRL_REGAD, regnum);
| FIELD_PREP(ASPEED_MDIO_CTRL_ST, st)
| FIELD_PREP(ASPEED_MDIO_CTRL_OP, op)
| FIELD_PREP(ASPEED_MDIO_CTRL_PHYAD, phyad)
| FIELD_PREP(ASPEED_MDIO_CTRL_REGAD, regad)
| FIELD_PREP(ASPEED_MDIO_DATA_MIIRDATA, data);
iowrite32(ctrl, ctx->base + ASPEED_MDIO_CTRL);
rc = readl_poll_timeout(ctx->base + ASPEED_MDIO_CTRL, ctrl,
return readl_poll_timeout(ctx->base + ASPEED_MDIO_CTRL, ctrl,
!(ctrl & ASPEED_MDIO_CTRL_FIRE),
ASPEED_MDIO_INTERVAL_US,
ASPEED_MDIO_TIMEOUT_US);
if (rc < 0)
return rc;
}
static int aspeed_mdio_get_data(struct mii_bus *bus)
{
struct aspeed_mdio *ctx = bus->priv;
u32 data;
int rc;
rc = readl_poll_timeout(ctx->base + ASPEED_MDIO_DATA, data,
data & ASPEED_MDIO_DATA_IDLE,
@ -78,31 +83,80 @@ static int aspeed_mdio_read(struct mii_bus *bus, int addr, int regnum)
return FIELD_GET(ASPEED_MDIO_DATA_MIIRDATA, data);
}
static int aspeed_mdio_read_c22(struct mii_bus *bus, int addr, int regnum)
{
int rc;
rc = aspeed_mdio_op(bus, ASPEED_MDIO_CTRL_ST_C22, MDIO_C22_OP_READ,
addr, regnum, 0);
if (rc < 0)
return rc;
return aspeed_mdio_get_data(bus);
}
static int aspeed_mdio_write_c22(struct mii_bus *bus, int addr, int regnum,
u16 val)
{
return aspeed_mdio_op(bus, ASPEED_MDIO_CTRL_ST_C22, MDIO_C22_OP_WRITE,
addr, regnum, val);
}
static int aspeed_mdio_read_c45(struct mii_bus *bus, int addr, int regnum)
{
u8 c45_dev = (regnum >> 16) & 0x1F;
u16 c45_addr = regnum & 0xFFFF;
int rc;
rc = aspeed_mdio_op(bus, ASPEED_MDIO_CTRL_ST_C45, MDIO_C45_OP_ADDR,
addr, c45_dev, c45_addr);
if (rc < 0)
return rc;
rc = aspeed_mdio_op(bus, ASPEED_MDIO_CTRL_ST_C45, MDIO_C45_OP_READ,
addr, c45_dev, 0);
if (rc < 0)
return rc;
return aspeed_mdio_get_data(bus);
}
static int aspeed_mdio_write_c45(struct mii_bus *bus, int addr, int regnum,
u16 val)
{
u8 c45_dev = (regnum >> 16) & 0x1F;
u16 c45_addr = regnum & 0xFFFF;
int rc;
rc = aspeed_mdio_op(bus, ASPEED_MDIO_CTRL_ST_C45, MDIO_C45_OP_ADDR,
addr, c45_dev, c45_addr);
if (rc < 0)
return rc;
return aspeed_mdio_op(bus, ASPEED_MDIO_CTRL_ST_C45, MDIO_C45_OP_WRITE,
addr, c45_dev, val);
}
static int aspeed_mdio_read(struct mii_bus *bus, int addr, int regnum)
{
dev_dbg(&bus->dev, "%s: addr: %d, regnum: %d\n", __func__, addr,
regnum);
if (regnum & MII_ADDR_C45)
return aspeed_mdio_read_c45(bus, addr, regnum);
return aspeed_mdio_read_c22(bus, addr, regnum);
}
static int aspeed_mdio_write(struct mii_bus *bus, int addr, int regnum, u16 val)
{
struct aspeed_mdio *ctx = bus->priv;
u32 ctrl;
dev_dbg(&bus->dev, "%s: addr: %d, regnum: %d, val: 0x%x\n",
__func__, addr, regnum, val);
/* Just clause 22 for the moment */
if (regnum & MII_ADDR_C45)
return -EOPNOTSUPP;
return aspeed_mdio_write_c45(bus, addr, regnum, val);
ctrl = ASPEED_MDIO_CTRL_FIRE
| FIELD_PREP(ASPEED_MDIO_CTRL_ST, ASPEED_MDIO_CTRL_ST_C22)
| FIELD_PREP(ASPEED_MDIO_CTRL_OP, MDIO_C22_OP_WRITE)
| FIELD_PREP(ASPEED_MDIO_CTRL_PHYAD, addr)
| FIELD_PREP(ASPEED_MDIO_CTRL_REGAD, regnum)
| FIELD_PREP(ASPEED_MDIO_CTRL_MIIWDATA, val);
iowrite32(ctrl, ctx->base + ASPEED_MDIO_CTRL);
return readl_poll_timeout(ctx->base + ASPEED_MDIO_CTRL, ctrl,
!(ctrl & ASPEED_MDIO_CTRL_FIRE),
ASPEED_MDIO_INTERVAL_US,
ASPEED_MDIO_TIMEOUT_US);
return aspeed_mdio_write_c22(bus, addr, regnum, val);
}
static int aspeed_mdio_probe(struct platform_device *pdev)
@ -125,6 +179,7 @@ static int aspeed_mdio_probe(struct platform_device *pdev)
bus->parent = &pdev->dev;
bus->read = aspeed_mdio_read;
bus->write = aspeed_mdio_write;
bus->probe_capabilities = MDIOBUS_C22_C45;
rc = of_mdiobus_register(bus, pdev->dev.of_node);
if (rc) {