memory: tegra: Unify struct tegra_mc across SoC generations

As another step towards unifying both the Tegra210 (and earlier) and
Tegra186 (and later) memory controller drivers, unify the structures
that are used to represent them.

Note that this comes at a slight space penalty since some fields are
not used on all generations, but the benefits of unifying the driver
outweigh the downsides.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-3-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
This commit is contained in:
Thierry Reding 2021-06-02 18:32:52 +02:00 committed by Krzysztof Kozlowski
parent 4f1ac76e5e
commit e899993845
2 changed files with 852 additions and 447 deletions

File diff suppressed because it is too large Load Diff

View File

@ -26,12 +26,20 @@ struct tegra_mc_timing {
struct tegra_mc_client {
unsigned int id;
const char *name;
unsigned int swgroup;
/*
* For Tegra210 and earlier, this is the SWGROUP ID used for IOVA translations in the
* Tegra SMMU, whereas on Tegra186 and later this is the ID used to override the ARM SMMU
* stream ID used for IOVA translations for the given memory client.
*/
union {
unsigned int swgroup;
unsigned int sid;
};
unsigned int fifo_size;
struct {
/* Tegra SMMU enable */
/* Tegra SMMU enable (Tegra210 and earlier) */
struct {
unsigned int reg;
unsigned int bit;
@ -44,6 +52,12 @@ struct tegra_mc_client {
unsigned int mask;
unsigned int def;
} la;
/* stream ID overrides (Tegra186 and later) */
struct {
unsigned int override;
unsigned int security;
} sid;
} regs;
};