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dt-bindings: nvmem: Fix node descriptions in uniphier-efuse example

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Prior to adding dt-bindings for SoC-dependent controllers, rename the
parent node to the generic name in the example.

And drop a parent node of the nvmem as it is not directly necessary here.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221213082449.2721-9-hayashi.kunihiko@socionext.com
Signed-off-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Kunihiko Hayashi 2022-12-13 17:24:40 +09:00 committed by Rob Herring
parent 4278eabebc
commit e8c650f627
1 changed files with 46 additions and 55 deletions
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101
Documentation/devicetree/bindings/nvmem/socionext,uniphier-efuse.yaml
View file

@ -31,65 +31,56 @@ unevaluatedProperties: false
examples:
- |
// The UniPhier eFuse should be a subnode of a "soc-glue" node.
efuse@100 {
compatible = "socionext,uniphier-efuse";
reg = <0x100 0x28>;
};
soc-glue@5f900000 {
compatible = "simple-mfd";
efuse@200 {
compatible = "socionext,uniphier-efuse";
reg = <0x200 0x68>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x5f900000 0x2000>;
efuse@100 {
compatible = "socionext,uniphier-efuse";
reg = <0x100 0x28>;
/* Data cells */
usb_rterm0: trim@54,4 {
reg = <0x54 1>;
bits = <4 2>;
};
efuse@200 {
compatible = "socionext,uniphier-efuse";
reg = <0x200 0x68>;
#address-cells = <1>;
#size-cells = <1>;
/* Data cells */
usb_rterm0: trim@54,4 {
reg = <0x54 1>;
bits = <4 2>;
};
usb_rterm1: trim@55,4 {
reg = <0x55 1>;
bits = <4 2>;
};
usb_rterm2: trim@58,4 {
reg = <0x58 1>;
bits = <4 2>;
};
usb_rterm3: trim@59,4 {
reg = <0x59 1>;
bits = <4 2>;
};
usb_sel_t0: trim@54,0 {
reg = <0x54 1>;
bits = <0 4>;
};
usb_sel_t1: trim@55,0 {
reg = <0x55 1>;
bits = <0 4>;
};
usb_sel_t2: trim@58,0 {
reg = <0x58 1>;
bits = <0 4>;
};
usb_sel_t3: trim@59,0 {
reg = <0x59 1>;
bits = <0 4>;
};
usb_hs_i0: trim@56,0 {
reg = <0x56 1>;
bits = <0 4>;
};
usb_hs_i2: trim@5a,0 {
reg = <0x5a 1>;
bits = <0 4>;
};
usb_rterm1: trim@55,4 {
reg = <0x55 1>;
bits = <4 2>;
};
usb_rterm2: trim@58,4 {
reg = <0x58 1>;
bits = <4 2>;
};
usb_rterm3: trim@59,4 {
reg = <0x59 1>;
bits = <4 2>;
};
usb_sel_t0: trim@54,0 {
reg = <0x54 1>;
bits = <0 4>;
};
usb_sel_t1: trim@55,0 {
reg = <0x55 1>;
bits = <0 4>;
};
usb_sel_t2: trim@58,0 {
reg = <0x58 1>;
bits = <0 4>;
};
usb_sel_t3: trim@59,0 {
reg = <0x59 1>;
bits = <0 4>;
};
usb_hs_i0: trim@56,0 {
reg = <0x56 1>;
bits = <0 4>;
};
usb_hs_i2: trim@5a,0 {
reg = <0x5a 1>;
bits = <0 4>;
};
};