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net: ethernet: mtk_eth_soc: implement dynamic interrupt moderation
Reduces the number of interrupts under load Signed-off-by: Felix Fietkau <nbd@nbd.name> [Ilya: add documentation for new struct fields] Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Felix Fietkau
David S. Miller
parent
6b4423b258
commit
e9229ffd55
3 changed files with 124 additions and 14 deletions
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@ -11,6 +11,7 @@ config NET_MEDIATEK_SOC
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tristate "MediaTek SoC Gigabit Ethernet support"
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depends on NET_DSA || !NET_DSA
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select PHYLINK
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select DIMLIB
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help
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This driver supports the gigabit ethernet MACs in the
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MediaTek SoC family.
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@ -1233,12 +1233,13 @@ static void mtk_update_rx_cpu_idx(struct mtk_eth *eth)
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static int mtk_poll_rx(struct napi_struct *napi, int budget,
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struct mtk_eth *eth)
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{
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struct dim_sample dim_sample = {};
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struct mtk_rx_ring *ring;
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int idx;
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struct sk_buff *skb;
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u8 *data, *new_data;
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struct mtk_rx_dma *rxd, trxd;
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int done = 0;
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int done = 0, bytes = 0;
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while (done < budget) {
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struct net_device *netdev;
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@ -1312,6 +1313,7 @@ static int mtk_poll_rx(struct napi_struct *napi, int budget,
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else
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skb_checksum_none_assert(skb);
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skb->protocol = eth_type_trans(skb, netdev);
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bytes += pktlen;
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if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX &&
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(trxd.rxd2 & RX_DMA_VTAG))
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@ -1344,6 +1346,12 @@ static int mtk_poll_rx(struct napi_struct *napi, int budget,
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mtk_update_rx_cpu_idx(eth);
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}
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eth->rx_packets += done;
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eth->rx_bytes += bytes;
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dim_update_sample(eth->rx_events, eth->rx_packets, eth->rx_bytes,
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&dim_sample);
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net_dim(ð->rx_dim, dim_sample);
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return done;
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}
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@ -1436,6 +1444,7 @@ static int mtk_poll_tx_pdma(struct mtk_eth *eth, int budget,
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static int mtk_poll_tx(struct mtk_eth *eth, int budget)
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{
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struct mtk_tx_ring *ring = ð->tx_ring;
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struct dim_sample dim_sample = {};
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unsigned int done[MTK_MAX_DEVS];
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unsigned int bytes[MTK_MAX_DEVS];
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int total = 0, i;
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@ -1453,8 +1462,14 @@ static int mtk_poll_tx(struct mtk_eth *eth, int budget)
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continue;
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netdev_completed_queue(eth->netdev[i], done[i], bytes[i]);
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total += done[i];
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eth->tx_packets += done[i];
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eth->tx_bytes += bytes[i];
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}
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dim_update_sample(eth->tx_events, eth->tx_packets, eth->tx_bytes,
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&dim_sample);
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net_dim(ð->tx_dim, dim_sample);
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if (mtk_queue_stopped(eth) &&
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(atomic_read(&ring->free_count) > ring->thresh))
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mtk_wake_queue(eth);
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@ -2129,6 +2144,7 @@ static irqreturn_t mtk_handle_irq_rx(int irq, void *_eth)
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{
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struct mtk_eth *eth = _eth;
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eth->rx_events++;
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if (likely(napi_schedule_prep(ð->rx_napi))) {
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__napi_schedule(ð->rx_napi);
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mtk_rx_irq_disable(eth, MTK_RX_DONE_INT);
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@ -2141,6 +2157,7 @@ static irqreturn_t mtk_handle_irq_tx(int irq, void *_eth)
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{
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struct mtk_eth *eth = _eth;
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eth->tx_events++;
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if (likely(napi_schedule_prep(ð->tx_napi))) {
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__napi_schedule(ð->tx_napi);
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mtk_tx_irq_disable(eth, MTK_TX_DONE_INT);
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@ -2325,6 +2342,9 @@ static int mtk_stop(struct net_device *dev)
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napi_disable(ð->tx_napi);
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napi_disable(ð->rx_napi);
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cancel_work_sync(ð->rx_dim.work);
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cancel_work_sync(ð->tx_dim.work);
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if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA))
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mtk_stop_dma(eth, MTK_QDMA_GLO_CFG);
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mtk_stop_dma(eth, MTK_PDMA_GLO_CFG);
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@ -2377,6 +2397,64 @@ static int mtk_clk_enable(struct mtk_eth *eth)
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return ret;
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}
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static void mtk_dim_rx(struct work_struct *work)
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{
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struct dim *dim = container_of(work, struct dim, work);
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struct mtk_eth *eth = container_of(dim, struct mtk_eth, rx_dim);
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struct dim_cq_moder cur_profile;
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u32 val, cur;
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cur_profile = net_dim_get_rx_moderation(eth->rx_dim.mode,
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dim->profile_ix);
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spin_lock_bh(ð->dim_lock);
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val = mtk_r32(eth, MTK_PDMA_DELAY_INT);
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val &= MTK_PDMA_DELAY_TX_MASK;
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val |= MTK_PDMA_DELAY_RX_EN;
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cur = min_t(u32, DIV_ROUND_UP(cur_profile.usec, 20), MTK_PDMA_DELAY_PTIME_MASK);
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val |= cur << MTK_PDMA_DELAY_RX_PTIME_SHIFT;
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cur = min_t(u32, cur_profile.pkts, MTK_PDMA_DELAY_PINT_MASK);
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val |= cur << MTK_PDMA_DELAY_RX_PINT_SHIFT;
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mtk_w32(eth, val, MTK_PDMA_DELAY_INT);
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mtk_w32(eth, val, MTK_QDMA_DELAY_INT);
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spin_unlock_bh(ð->dim_lock);
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dim->state = DIM_START_MEASURE;
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}
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static void mtk_dim_tx(struct work_struct *work)
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{
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struct dim *dim = container_of(work, struct dim, work);
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struct mtk_eth *eth = container_of(dim, struct mtk_eth, tx_dim);
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struct dim_cq_moder cur_profile;
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u32 val, cur;
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cur_profile = net_dim_get_tx_moderation(eth->tx_dim.mode,
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dim->profile_ix);
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spin_lock_bh(ð->dim_lock);
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val = mtk_r32(eth, MTK_PDMA_DELAY_INT);
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val &= MTK_PDMA_DELAY_RX_MASK;
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val |= MTK_PDMA_DELAY_TX_EN;
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cur = min_t(u32, DIV_ROUND_UP(cur_profile.usec, 20), MTK_PDMA_DELAY_PTIME_MASK);
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val |= cur << MTK_PDMA_DELAY_TX_PTIME_SHIFT;
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cur = min_t(u32, cur_profile.pkts, MTK_PDMA_DELAY_PINT_MASK);
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val |= cur << MTK_PDMA_DELAY_TX_PINT_SHIFT;
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mtk_w32(eth, val, MTK_PDMA_DELAY_INT);
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mtk_w32(eth, val, MTK_QDMA_DELAY_INT);
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spin_unlock_bh(ð->dim_lock);
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dim->state = DIM_START_MEASURE;
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}
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static int mtk_hw_init(struct mtk_eth *eth)
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{
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int i, val, ret;
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@ -2398,9 +2476,6 @@ static int mtk_hw_init(struct mtk_eth *eth)
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goto err_disable_pm;
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}
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/* enable interrupt delay for RX */
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mtk_w32(eth, MTK_PDMA_DELAY_RX_DELAY, MTK_PDMA_DELAY_INT);
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/* disable delay and normal interrupt */
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mtk_tx_irq_disable(eth, ~0);
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mtk_rx_irq_disable(eth, ~0);
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@ -2439,11 +2514,11 @@ static int mtk_hw_init(struct mtk_eth *eth)
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/* Enable RX VLan Offloading */
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mtk_w32(eth, 1, MTK_CDMP_EG_CTRL);
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/* enable interrupt delay for RX */
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mtk_w32(eth, MTK_PDMA_DELAY_RX_DELAY, MTK_PDMA_DELAY_INT);
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/* set interrupt delays based on current Net DIM sample */
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mtk_dim_rx(ð->rx_dim.work);
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mtk_dim_tx(ð->tx_dim.work);
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/* disable delay and normal interrupt */
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mtk_w32(eth, 0, MTK_QDMA_DELAY_INT);
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mtk_tx_irq_disable(eth, ~0);
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mtk_rx_irq_disable(eth, ~0);
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@ -2978,6 +3053,13 @@ static int mtk_probe(struct platform_device *pdev)
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spin_lock_init(ð->page_lock);
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spin_lock_init(ð->tx_irq_lock);
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spin_lock_init(ð->rx_irq_lock);
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spin_lock_init(ð->dim_lock);
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eth->rx_dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
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INIT_WORK(ð->rx_dim.work, mtk_dim_rx);
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eth->tx_dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
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INIT_WORK(ð->tx_dim.work, mtk_dim_tx);
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if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) {
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eth->ethsys = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
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@ -16,6 +16,7 @@
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#include <linux/refcount.h>
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#include <linux/phylink.h>
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#include <linux/rhashtable.h>
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#include <linux/dim.h>
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#include "mtk_ppe.h"
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#define MTK_QDMA_PAGE_SIZE 2048
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@ -137,13 +138,18 @@
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/* PDMA Delay Interrupt Register */
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#define MTK_PDMA_DELAY_INT 0xa0c
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#define MTK_PDMA_DELAY_RX_MASK GENMASK(15, 0)
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#define MTK_PDMA_DELAY_RX_EN BIT(15)
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#define MTK_PDMA_DELAY_RX_PINT 4
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#define MTK_PDMA_DELAY_RX_PINT_SHIFT 8
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#define MTK_PDMA_DELAY_RX_PTIME 4
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#define MTK_PDMA_DELAY_RX_DELAY \
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(MTK_PDMA_DELAY_RX_EN | MTK_PDMA_DELAY_RX_PTIME | \
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(MTK_PDMA_DELAY_RX_PINT << MTK_PDMA_DELAY_RX_PINT_SHIFT))
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#define MTK_PDMA_DELAY_RX_PTIME_SHIFT 0
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#define MTK_PDMA_DELAY_TX_MASK GENMASK(31, 16)
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#define MTK_PDMA_DELAY_TX_EN BIT(31)
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#define MTK_PDMA_DELAY_TX_PINT_SHIFT 24
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#define MTK_PDMA_DELAY_TX_PTIME_SHIFT 16
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#define MTK_PDMA_DELAY_PINT_MASK 0x7f
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#define MTK_PDMA_DELAY_PTIME_MASK 0xff
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/* PDMA Interrupt Status Register */
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#define MTK_PDMA_INT_STATUS 0xa20
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@ -225,6 +231,7 @@
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/* QDMA Interrupt Status Register */
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#define MTK_QDMA_INT_STATUS 0x1A18
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#define MTK_RX_DONE_DLY BIT(30)
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#define MTK_TX_DONE_DLY BIT(28)
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#define MTK_RX_DONE_INT3 BIT(19)
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#define MTK_RX_DONE_INT2 BIT(18)
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#define MTK_RX_DONE_INT1 BIT(17)
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@ -234,8 +241,7 @@
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#define MTK_TX_DONE_INT1 BIT(1)
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#define MTK_TX_DONE_INT0 BIT(0)
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#define MTK_RX_DONE_INT MTK_RX_DONE_DLY
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#define MTK_TX_DONE_INT (MTK_TX_DONE_INT0 | MTK_TX_DONE_INT1 | \
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MTK_TX_DONE_INT2 | MTK_TX_DONE_INT3)
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#define MTK_TX_DONE_INT MTK_TX_DONE_DLY
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/* QDMA Interrupt grouping registers */
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#define MTK_QDMA_INT_GRP1 0x1a20
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@ -849,6 +855,7 @@ struct mtk_sgmii {
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* @page_lock: Make sure that register operations are atomic
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* @tx_irq__lock: Make sure that IRQ register operations are atomic
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* @rx_irq__lock: Make sure that IRQ register operations are atomic
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* @dim_lock: Make sure that Net DIM operations are atomic
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* @dummy_dev: we run 2 netdevs on 1 physical DMA ring and need a
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* dummy for NAPI to work
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* @netdev: The netdev instances
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@ -867,6 +874,14 @@ struct mtk_sgmii {
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* @rx_ring_qdma: Pointer to the memory holding info about the QDMA RX ring
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* @tx_napi: The TX NAPI struct
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* @rx_napi: The RX NAPI struct
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* @rx_events: Net DIM RX event counter
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* @rx_packets: Net DIM RX packet counter
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* @rx_bytes: Net DIM RX byte counter
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* @rx_dim: Net DIM RX context
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* @tx_events: Net DIM TX event counter
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* @tx_packets: Net DIM TX packet counter
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* @tx_bytes: Net DIM TX byte counter
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* @tx_dim: Net DIM TX context
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* @scratch_ring: Newer SoCs need memory for a second HW managed TX ring
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* @phy_scratch_ring: physical address of scratch_ring
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* @scratch_head: The scratch memory that scratch_ring points to.
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@ -911,6 +926,18 @@ struct mtk_eth {
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const struct mtk_soc_data *soc;
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spinlock_t dim_lock;
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u32 rx_events;
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u32 rx_packets;
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u32 rx_bytes;
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struct dim rx_dim;
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u32 tx_events;
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u32 tx_packets;
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u32 tx_bytes;
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struct dim tx_dim;
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u32 tx_int_mask_reg;
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u32 tx_int_status_reg;
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u32 rx_dma_l4_valid;
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