mirrors/linux-stable
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git synced 2024-10-02 23:27:06 +00:00
Code Issues Releases Wiki Activity

riscv: Apply a static assert to riscv_isa_ext_id

Browse source 
Add a static assert to ensure a RISCV_ISA_EXT_* enum is never
created with a value >= RISCV_ISA_EXT_MAX. We can do this by
putting RISCV_ISA_EXT_ID_MAX to more work. Before it was
redundant with RISCV_ISA_EXT_MAX and hence only used to
document the limit. Now it grows with the enum and is used to
check the limit.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20221201113750.18021-1-ajones@ventanamicro.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
This commit is contained in:
Andrew Jones 2022-12-01 12:37:50 +01:00 committed by Palmer Dabbelt
parent c3ec1e8964
commit e923f4625e
No known key found for this signature in database
GPG key ID: 2E1319F35FBB1889
1 changed files with 2 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

3
arch/riscv/include/asm/hwcap.h
View file

@ -59,8 +59,9 @@ enum riscv_isa_ext_id {
RISCV_ISA_EXT_ZIHINTPAUSE, RISCV_ISA_EXT_ZIHINTPAUSE,
RISCV_ISA_EXT_SSTC, RISCV_ISA_EXT_SSTC,
RISCV_ISA_EXT_SVINVAL, RISCV_ISA_EXT_SVINVAL,
RISCV_ISA_EXT_ID_MAX = RISCV_ISA_EXT_MAX, RISCV_ISA_EXT_ID_MAX
}; };
static_assert(RISCV_ISA_EXT_ID_MAX <= RISCV_ISA_EXT_MAX);
/* /*
* This enum represents the logical ID for each RISC-V ISA extension static * This enum represents the logical ID for each RISC-V ISA extension static