IOMMU Fixes for Linux v6.1-rc1:

Including:
 
 	- Intel VT-d fixes from Lu Baolu:
 	  - Fix a lockdep splat issue in intel_iommu_init().
 	  - Allow NVS regions to pass RMRR check.
 	  - Domain cleanup in error path.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEr9jSbILcajRFYWYyK/BELZcBGuMFAmNSuP0ACgkQK/BELZcB
 GuNRXRAAkGA7n8wuKsd6W7pPQQY5iRfYvBoGw5W46e9aZCTurOhmSjL6KDQzq+rN
 MWVlfd2CPQEoJUbIIEmCBdPhBcfMv9sv07eDzVkXG/yy181W1sp9qQXDBT+PGt3A
 QURuUVnXXm+/aHscXT9/WAxQoi8s1tNhgPPc5NKr5AM0FMn6poPgEyISOl7ipwT/
 EyzDQoKGkFw+jDUh9UmjSw8NQWhPok5ZT8jUBD1tSAKnjcfL5/cFjCW/xb1rZwR8
 EiQFhseOr8j7diqyoqH+eWO0ELlh60pY0Urm8OR6bsl+7KiANf8Xg9aQBdVhlj9Y
 g/noAYCt+kXdxqug3NDcWihibLlaKY01lXqVrtNayYK2KsM6YDHDcmSPy8PYzQCZ
 aqEsNOgJBOgMN/BAuUdtUTFIOTst5L54Pgu73xoOG7JU2acRXdl9x50Ekr/Nm3mZ
 YrusLVzCeOk5yd20OWxBZuDF55xjyou7748Hb/7XfAhJK9g0Nh1QTPVD67Cdw2UJ
 eTvgmgmWZDZMvg8Ah3p7gTgcFHw1WsvuUNcPyiqjAfkovL1TYIbqoRDHQ+I8xUR/
 cC2mBzwkjbduJkp9+xbOv6kPecGA+djD+sfFg7oc8bdIGYwoLLOC0DtoeWbiEpMM
 +nPP4om62Lt7pUqfCoOy66a4ALaGShh93QJ57Ndr9loCK0MkPpE=
 =ZvCa
 -----END PGP SIGNATURE-----

Merge tag 'iommu-fixes-v6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu

Pull iommu fixes from Joerg Roedel:
 "Intel VT-d fixes:

   - Fix a lockdep splat issue in intel_iommu_init()

   - Allow NVS regions to pass RMRR check

   - Domain cleanup in error path"

* tag 'iommu-fixes-v6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu:
  iommu/vt-d: Clean up si_domain in the init_dmars() error path
  iommu/vt-d: Allow NVS regions in arch_rmrr_sanity_check()
  iommu/vt-d: Use rcu_lock in get_resv_regions
  iommu: Add gfp parameter to iommu_alloc_resv_region
This commit is contained in:
Linus Torvalds 2022-10-21 17:47:39 -07:00
commit e97eace635
11 changed files with 37 additions and 21 deletions

View file

@ -25,8 +25,10 @@ arch_rmrr_sanity_check(struct acpi_dmar_reserved_memory *rmrr)
{
u64 start = rmrr->base_address;
u64 end = rmrr->end_address + 1;
int entry_type;
if (e820__mapped_all(start, end, E820_TYPE_RESERVED))
entry_type = e820__get_entry_type(start, end);
if (entry_type == E820_TYPE_RESERVED || entry_type == E820_TYPE_NVS)
return 0;
pr_err(FW_BUG "No firmware reserved region can cover this RMRR [%#018Lx-%#018Lx], contact BIOS vendor for fixes\n",

View file

@ -1142,7 +1142,8 @@ static void iort_iommu_msi_get_resv_regions(struct device *dev,
struct iommu_resv_region *region;
region = iommu_alloc_resv_region(base + SZ_64K, SZ_64K,
prot, IOMMU_RESV_MSI);
prot, IOMMU_RESV_MSI,
GFP_KERNEL);
if (region)
list_add_tail(&region->list, head);
}

View file

@ -2330,7 +2330,8 @@ static void amd_iommu_get_resv_regions(struct device *dev,
type = IOMMU_RESV_RESERVED;
region = iommu_alloc_resv_region(entry->address_start,
length, prot, type);
length, prot, type,
GFP_KERNEL);
if (!region) {
dev_err(dev, "Out of memory allocating dm-regions\n");
return;
@ -2340,14 +2341,14 @@ static void amd_iommu_get_resv_regions(struct device *dev,
region = iommu_alloc_resv_region(MSI_RANGE_START,
MSI_RANGE_END - MSI_RANGE_START + 1,
0, IOMMU_RESV_MSI);
0, IOMMU_RESV_MSI, GFP_KERNEL);
if (!region)
return;
list_add_tail(&region->list, head);
region = iommu_alloc_resv_region(HT_RANGE_START,
HT_RANGE_END - HT_RANGE_START + 1,
0, IOMMU_RESV_RESERVED);
0, IOMMU_RESV_RESERVED, GFP_KERNEL);
if (!region)
return;
list_add_tail(&region->list, head);

View file

@ -758,7 +758,7 @@ static void apple_dart_get_resv_regions(struct device *dev,
region = iommu_alloc_resv_region(DOORBELL_ADDR,
PAGE_SIZE, prot,
IOMMU_RESV_MSI);
IOMMU_RESV_MSI, GFP_KERNEL);
if (!region)
return;

View file

@ -2757,7 +2757,7 @@ static void arm_smmu_get_resv_regions(struct device *dev,
int prot = IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO;
region = iommu_alloc_resv_region(MSI_IOVA_BASE, MSI_IOVA_LENGTH,
prot, IOMMU_RESV_SW_MSI);
prot, IOMMU_RESV_SW_MSI, GFP_KERNEL);
if (!region)
return;

View file

@ -1534,7 +1534,7 @@ static void arm_smmu_get_resv_regions(struct device *dev,
int prot = IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO;
region = iommu_alloc_resv_region(MSI_IOVA_BASE, MSI_IOVA_LENGTH,
prot, IOMMU_RESV_SW_MSI);
prot, IOMMU_RESV_SW_MSI, GFP_KERNEL);
if (!region)
return;

View file

@ -2410,6 +2410,7 @@ static int __init si_domain_init(int hw)
if (md_domain_init(si_domain, DEFAULT_DOMAIN_ADDRESS_WIDTH)) {
domain_exit(si_domain);
si_domain = NULL;
return -EFAULT;
}
@ -3052,6 +3053,10 @@ static int __init init_dmars(void)
disable_dmar_iommu(iommu);
free_dmar_iommu(iommu);
}
if (si_domain) {
domain_exit(si_domain);
si_domain = NULL;
}
return ret;
}
@ -4534,7 +4539,7 @@ static void intel_iommu_get_resv_regions(struct device *device,
struct device *i_dev;
int i;
down_read(&dmar_global_lock);
rcu_read_lock();
for_each_rmrr_units(rmrr) {
for_each_active_dev_scope(rmrr->devices, rmrr->devices_cnt,
i, i_dev) {
@ -4552,14 +4557,15 @@ static void intel_iommu_get_resv_regions(struct device *device,
IOMMU_RESV_DIRECT_RELAXABLE : IOMMU_RESV_DIRECT;
resv = iommu_alloc_resv_region(rmrr->base_address,
length, prot, type);
length, prot, type,
GFP_ATOMIC);
if (!resv)
break;
list_add_tail(&resv->list, head);
}
}
up_read(&dmar_global_lock);
rcu_read_unlock();
#ifdef CONFIG_INTEL_IOMMU_FLOPPY_WA
if (dev_is_pci(device)) {
@ -4567,7 +4573,8 @@ static void intel_iommu_get_resv_regions(struct device *device,
if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_ISA) {
reg = iommu_alloc_resv_region(0, 1UL << 24, prot,
IOMMU_RESV_DIRECT_RELAXABLE);
IOMMU_RESV_DIRECT_RELAXABLE,
GFP_KERNEL);
if (reg)
list_add_tail(&reg->list, head);
}
@ -4576,7 +4583,7 @@ static void intel_iommu_get_resv_regions(struct device *device,
reg = iommu_alloc_resv_region(IOAPIC_RANGE_START,
IOAPIC_RANGE_END - IOAPIC_RANGE_START + 1,
0, IOMMU_RESV_MSI);
0, IOMMU_RESV_MSI, GFP_KERNEL);
if (!reg)
return;
list_add_tail(&reg->list, head);

View file

@ -504,7 +504,7 @@ static int iommu_insert_resv_region(struct iommu_resv_region *new,
LIST_HEAD(stack);
nr = iommu_alloc_resv_region(new->start, new->length,
new->prot, new->type);
new->prot, new->type, GFP_KERNEL);
if (!nr)
return -ENOMEM;
@ -2579,11 +2579,12 @@ EXPORT_SYMBOL(iommu_put_resv_regions);
struct iommu_resv_region *iommu_alloc_resv_region(phys_addr_t start,
size_t length, int prot,
enum iommu_resv_type type)
enum iommu_resv_type type,
gfp_t gfp)
{
struct iommu_resv_region *region;
region = kzalloc(sizeof(*region), GFP_KERNEL);
region = kzalloc(sizeof(*region), gfp);
if (!region)
return NULL;

View file

@ -917,7 +917,8 @@ static void mtk_iommu_get_resv_regions(struct device *dev,
continue;
region = iommu_alloc_resv_region(resv->iova_base, resv->size,
prot, IOMMU_RESV_RESERVED);
prot, IOMMU_RESV_RESERVED,
GFP_KERNEL);
if (!region)
return;

View file

@ -490,11 +490,13 @@ static int viommu_add_resv_mem(struct viommu_endpoint *vdev,
fallthrough;
case VIRTIO_IOMMU_RESV_MEM_T_RESERVED:
region = iommu_alloc_resv_region(start, size, 0,
IOMMU_RESV_RESERVED);
IOMMU_RESV_RESERVED,
GFP_KERNEL);
break;
case VIRTIO_IOMMU_RESV_MEM_T_MSI:
region = iommu_alloc_resv_region(start, size, prot,
IOMMU_RESV_MSI);
IOMMU_RESV_MSI,
GFP_KERNEL);
break;
}
if (!region)
@ -909,7 +911,8 @@ static void viommu_get_resv_regions(struct device *dev, struct list_head *head)
*/
if (!msi) {
msi = iommu_alloc_resv_region(MSI_IOVA_BASE, MSI_IOVA_LENGTH,
prot, IOMMU_RESV_SW_MSI);
prot, IOMMU_RESV_SW_MSI,
GFP_KERNEL);
if (!msi)
return;

View file

@ -455,7 +455,7 @@ extern void iommu_set_default_translated(bool cmd_line);
extern bool iommu_default_passthrough(void);
extern struct iommu_resv_region *
iommu_alloc_resv_region(phys_addr_t start, size_t length, int prot,
enum iommu_resv_type type);
enum iommu_resv_type type, gfp_t gfp);
extern int iommu_get_group_resv_regions(struct iommu_group *group,
struct list_head *head);