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s390/ctl_reg: make __ctl_load a full memory barrier
We have quite a lot of code that depends on the order of the __ctl_load inline assemby and subsequent memory accesses, like e.g. disabling lowcore protection and the writing to lowcore. Since the __ctl_load macro does not have memory barrier semantics, nor any other dependencies the compiler is, theoretically, free to shuffle code around. Or in other words: storing to lowcore could happen before lowcore protection is disabled. In order to avoid this class of potential bugs simply add a full memory barrier to the __ctl_load macro. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
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@ -15,7 +15,9 @@
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BUILD_BUG_ON(sizeof(addrtype) != (high - low + 1) * sizeof(long));\
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asm volatile( \
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" lctlg %1,%2,%0\n" \
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: : "Q" (*(addrtype *)(&array)), "i" (low), "i" (high));\
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: \
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: "Q" (*(addrtype *)(&array)), "i" (low), "i" (high) \
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: "memory"); \
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}
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#define __ctl_store(array, low, high) { \
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