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32bit devicetree changes for Rockchip including removal of skeleton.dtsi

Browse source 
inclusion, missing unit names for memory nodes, various frequency
 optimizations allowing for better performance on rk3066, the usage of
 pin constants to bridge between the two numbering schemes used (gpio
 controllers using 0-31 and pins being labeled A0-A7,..., D0-D7)
 and UHS/HS modes for the mmc controllers on the popmetal board.
 
 Two new boards, the PX3-based evaluation board, with the PX3 being an
 industrial variant of the rk3188 soc and the Rikomagic MK808 board
 based around the rk3066 are also added.
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Merge tag 'v4.10-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

32bit devicetree changes for Rockchip including removal of skeleton.dtsi
inclusion, missing unit names for memory nodes, various frequency
optimizations allowing for better performance on rk3066, the usage of
pin constants to bridge between the two numbering schemes used (gpio
controllers using 0-31 and pins being labeled A0-A7,..., D0-D7)
and UHS/HS modes for the mmc controllers on the popmetal board.

Two new boards, the PX3-based evaluation board, with the PX3 being an
industrial variant of the rk3188 soc and the Rikomagic MK808 board
based around the rk3066 are also added.

* tag 'v4.10-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (21 commits)
  ARM: dts: rockchip: replace to "max-frequency" instead of "clock-freq-min-max"
  ARM: dts: rockchip: Set sdmmc frequency at boot time for rk3066a
  ARM: dts: rockchip: use pin constants to describe gpios on Popmetal-RK3288
  include: dt-bindings: Add GPIO pin index definition for rockchip pinctrl
  ARM: dts: rockchip: Add rk3066 MK808 board
  devicetree: Add vendor prefix for Rikomagic
  ARM: dts: rockchip: initialize rk3066 PLL clock rate
  clk: rockchip: Add binding ids for cpu and peri clocks on rk3066
  ARM: dts: rockchip: enable HS200/DDR52 mode for emmc on rk3288-popmetal
  ARM: dts: rockchip: Support UHS mode for SD card on PopMetal-RK3288 board
  ARM: dts: rockchip: remove always-on and boot-on from vcc_sd for px3-evb
  ARM: dts: rockchip: update compatible strings for Rockchip efuse
  ARM: dts: rockchip: add rockchip PX3 Evaluation board
  ARM: dts: rockchip: Add missing unit name to memory nodes in rk3xxx boards
  ARM: dts: rockchip: Add missing unit name to memory nodes in rk3288 boards
  ARM: dts: rockchip: Add missing unit name to memory nodes in rk322x boards
  ARM: dts: rockchip: Add missing unit name to memory nodes in rk3036 boards
  ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk3xxx.dtsi
  ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk3288.dtsi
  ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk322x.dtsi
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2016-11-17 23:31:55 -08:00
commit e99b4c970b
30 changed files with 639 additions and 46 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
Documentation/devicetree/bindings/arm/rockchip.txt
View file

@ -25,6 +25,10 @@ Rockchip platforms device tree bindings
Required root node properties:
- compatible = "radxa,rock2-square", "rockchip,rk3288";
- Rikomagic MK808 v1 board:
Required root node properties:
- compatible = "rikomagic,mk808", "rockchip,rk3066a";
- Firefly Firefly-RK3288 board:
Required root node properties:
- compatible = "firefly,firefly-rk3288", "rockchip,rk3288";

1
Documentation/devicetree/bindings/vendor-prefixes.txt
View file

@ -229,6 +229,7 @@ realtek Realtek Semiconductor Corp.
renesas Renesas Electronics Corporation
richtek Richtek Technology Corporation
ricoh Ricoh Co. Ltd.
rikomagic Rikomagic Tech Corp. Ltd
rockchip Fuzhou Rockchip Electronics Co., Ltd
samsung Samsung Semiconductor
sandisk Sandisk Corporation

2
arch/arm/boot/dts/Makefile
View file

@ -640,7 +640,9 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3036-kylin.dtb \
rk3066a-bqcurie2.dtb \
rk3066a-marsboard.dtb \
rk3066a-mk808.dtb \
rk3066a-rayeager.dtb \
rk3188-px3-evb.dtb \
rk3188-radxarock.dtb \
rk3228-evb.dtb \
rk3229-evb.dtb \

2
arch/arm/boot/dts/rk3036-evb.dts
View file

@ -46,7 +46,7 @@ / {
model = "Rockchip RK3036 Evaluation board";
compatible = "rockchip,rk3036-evb", "rockchip,rk3036";
memory {
memory@60000000 {
device_type = "memory";
reg = <0x60000000 0x40000000>;
};

2
arch/arm/boot/dts/rk3036-kylin.dts
View file

@ -46,7 +46,7 @@ / {
model = "Rockchip RK3036 KylinBoard";
compatible = "rockchip,rk3036-kylin", "rockchip,rk3036";
memory {
memory@60000000 {
device_type = "memory";
reg = <0x60000000 0x20000000>;
};

10
arch/arm/boot/dts/rk3036.dtsi
View file

@ -44,9 +44,11 @@
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/clock/rk3036-cru.h>
#include <dt-bindings/soc/rockchip,boot-mode.h>
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "rockchip,rk3036";
interrupt-parent = <&gic>;
@ -244,7 +246,7 @@ sdmmc: dwmmc@10214000 {
compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x10214000 0x4000>;
clock-frequency = <37500000>;
clock-freq-min-max = <400000 37500000>;
max-frequency = <37500000>;
clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
clock-names = "biu", "ciu";
fifo-depth = <0x100>;
@ -255,7 +257,7 @@ sdmmc: dwmmc@10214000 {
sdio: dwmmc@10218000 {
compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x10218000 0x4000>;
clock-freq-min-max = <400000 37500000>;
max-frequency = <37500000>;
clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
<&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
@ -271,7 +273,7 @@ emmc: dwmmc@1021c000 {
bus-width = <8>;
cap-mmc-highspeed;
clock-frequency = <37500000>;
clock-freq-min-max = <400000 37500000>;
max-frequency = <37500000>;
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";

2
arch/arm/boot/dts/rk3066a-bqcurie2.dts
View file

@ -49,7 +49,7 @@ / {
model = "bq Curie 2";
compatible = "mundoreader,bq-curie2", "rockchip,rk3066a";
memory {
memory@60000000 {
device_type = "memory";
reg = <0x60000000 0x40000000>;
};

2
arch/arm/boot/dts/rk3066a-marsboard.dts
View file

@ -47,7 +47,7 @@ / {
model = "MarsBoard RK3066";
compatible = "haoyu,marsboard-rk3066", "rockchip,rk3066a";
memory {
memory@60000000 {
device_type = "memory";
reg = <0x60000000 0x40000000>;
};

195
arch/arm/boot/dts/rk3066a-mk808.dts Normal file
View file

@ -0,0 +1,195 @@
/*
* Copyright (c) 2016 Paweł Jarosz <paweljarosz3691@gmail.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "rk3066a.dtsi"
/ {
model = "Rikomagic MK808";
compatible = "rikomagic,mk808", "rockchip,rk3066a";
chosen {
stdout-path = "serial2:115200n8";
};
memory@60000000 {
reg = <0x60000000 0x40000000>;
device_type = "memory";
};
gpio-leds {
compatible = "gpio-leds";
blue {
label = "mk808:blue:power";
gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "default-on";
};
};
vcc_io: vcc-io {
compatible = "regulator-fixed";
regulator-name = "vcc_io";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vcc_host: usb-host-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 6 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&host_drv>;
pinctrl-names = "default";
regulator-always-on;
regulator-name = "host-pwr";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
startup-delay-us = <100000>;
vin-supply = <&vcc_io>;
};
vcc_otg: usb-otg-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 5 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&otg_drv>;
pinctrl-names = "default";
regulator-always-on;
regulator-name = "vcc_otg";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
startup-delay-us = <100000>;
vin-supply = <&vcc_io>;
};
vcc_sd: sdmmc-regulator {
compatible = "regulator-fixed";
gpio = <&gpio3 7 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&sdmmc_pwr>;
pinctrl-names = "default";
regulator-name = "vcc_sd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <100000>;
vin-supply = <&vcc_io>;
};
vcc_wifi: sdio-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio3 24 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&wifi_pwr>;
pinctrl-names = "default";
regulator-name = "vcc_wifi";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <100000>;
vin-supply = <&vcc_io>;
};
};
&mmc0 {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
num-slots = <1>;
vmmc-supply = <&vcc_sd>;
status = "okay";
};
&mmc1 {
bus-width = <4>;
disable-wp;
non-removable;
num-slots = <1>;
pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_bus4>;
pinctrl-names = "default";
vmmc-supply = <&vcc_wifi>;
status = "okay";
};
&pinctrl {
usb-host {
host_drv: host-drv {
rockchip,pins = <RK_GPIO0 6 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
usb-otg {
otg_drv: otg-drv {
rockchip,pins = <RK_GPIO0 5 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
sdmmc {
sdmmc_pwr: sdmmc-pwr {
rockchip,pins = <RK_GPIO3 7 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
sdio {
wifi_pwr: wifi-pwr {
rockchip,pins = <RK_GPIO3 24 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&uart2 {
status = "okay";
};
&usb_host {
status = "okay";
};
&usb_otg {
status = "okay";
};
&usbphy {
status = "okay";
};
&wdt {
status = "okay";
};

2
arch/arm/boot/dts/rk3066a-rayeager.dts
View file

@ -48,7 +48,7 @@ / {
model = "Rayeager PX2";
compatible = "chipspark,rayeager-px2", "rockchip,rk3066a";
memory {
memory@60000000 {
device_type = "memory";
reg = <0x60000000 0x40000000>;
};

12
arch/arm/boot/dts/rk3066a.dtsi
View file

@ -151,6 +151,14 @@ cru: clock-controller@20000000 {
#clock-cells = <1>;
#reset-cells = <1>;
assigned-clocks = <&cru PLL_CPLL>, <&cru PLL_GPLL>,
<&cru ACLK_CPU>, <&cru HCLK_CPU>,
<&cru PCLK_CPU>, <&cru ACLK_PERI>,
<&cru HCLK_PERI>, <&cru PCLK_PERI>;
assigned-clock-rates = <400000000>, <594000000>,
<300000000>, <150000000>,
<75000000>, <300000000>,
<150000000>, <75000000>;
};
timer@2000e000 {
@ -162,7 +170,7 @@ timer@2000e000 {
};
efuse: efuse@20010000 {
compatible = "rockchip,rockchip-efuse";
compatible = "rockchip,rk3066a-efuse";
reg = <0x20010000 0x4000>;
#address-cells = <1>;
#size-cells = <1>;
@ -628,6 +636,8 @@ &i2c4 {
};
&mmc0 {
clock-frequency = <50000000>;
max-frequency = <50000000>;
pinctrl-names = "default";
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4>;
};

328
arch/arm/boot/dts/rk3188-px3-evb.dts Normal file
View file

@ -0,0 +1,328 @@
/*
* Copyright (c) 2016 Andy Yan <andy.yan@rock-chips.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include "rk3188.dtsi"
/ {
model = "Rockchip PX3-EVB";
compatible = "rockchip,px3-evb", "rockchip,px3", "rockchip,rk3188";
chosen {
stdout-path = "serial2:115200n8";
};
memory@60000000 {
reg = <0x60000000 0x80000000>;
device_type = "memory";
};
gpio-keys {
compatible = "gpio-keys";
autorepeat;
power {
gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
label = "GPIO Key Power";
linux,input-type = <1>;
wakeup-source;
debounce-interval = <100>;
};
};
vcc_sys: vsys-regulator {
compatible = "regulator-fixed";
regulator-name = "vsys";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
};
};
&cpu0 {
cpu0-supply = <&vdd_cpu>;
};
&emmc {
bus-width = <8>;
cap-mmc-highspeed;
disable-wp;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_rst>;
status = "okay";
};
&i2c0 {
status = "okay";
accelerometer@18 {
compatible = "bosch,bma250";
reg = <0x18>;
interrupt-parent = <&gpio0>;
interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
};
};
&i2c1 {
status = "okay";
clock-frequency = <400000>;
rk808: pmic@1c {
compatible = "rockchip,rk818";
reg = <0x1c>;
interrupt-parent = <&gpio0>;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
rockchip,system-power-controller;
wakeup-source;
#clock-cells = <1>;
clock-output-names = "xin32k", "rk808-clkout2";
vcc1-supply = <&vcc_sys>;
vcc2-supply = <&vcc_sys>;
vcc3-supply = <&vcc_sys>;
vcc4-supply = <&vcc_sys>;
vcc6-supply = <&vcc_sys>;
vcc7-supply = <&vcc_sys>;
vcc8-supply = <&vcc_io>;
vcc9-supply = <&vcc_io>;
regulators {
vdd_cpu: DCDC_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1350000>;
regulator-name = "vdd_arm";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_gpu: DCDC_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1250000>;
regulator-name = "vdd_gpu";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1000000>;
};
};
vcc_ddr: DCDC_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc_ddr";
regulator-state-mem {
regulator-on-in-suspend;
};
};
vcc_io: DCDC_REG4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc_io";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vcc_cif: LDO_REG1 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc_cif";
};
vcc_jetta33: LDO_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc_jetta33";
};
vdd_10: LDO_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-name = "vdd_10";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1000000>;
};
};
lvds_12: LDO_REG4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "lvds_12";
};
lvds_25: LDO_REG5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "lvds_25";
};
cif_18: LDO_REG6 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-name = "cif_18";
};
vcc_sd: LDO_REG7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc_sd";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
wl_18: LDO_REG8 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "wl_18";
};
lcd_33: SWITCH_REG1 {
regulator-name = "lcd_33";
};
};
};
};
&i2c2 {
gsl1680: touchscreen@40 {
compatible = "silead,gsl1680";
reg = <0x40>;
interrupt-parent = <&gpio1>;
interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
power-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
touchscreen-size-x = <800>;
touchscreen-size-y = <1280>;
silead,max-fingers = <5>;
};
};
&mmc0 {
num-slots = <1>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
vmmc-supply = <&vcc_sd>;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
};
&pinctrl {
pcfg_output_low: pcfg-output-low {
output-low;
};
usb {
host_vbus_drv: host-vbus-drv {
rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_none>;
};
otg_vbus_drv: otg-vbus-drv {
rockchip,pins = <2 31 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&pwm1 {
status = "okay";
};
&pwm2 {
status = "okay";
};
&pwm3 {
status = "okay";
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&uart3 {
status = "okay";
};
&usbphy {
status = "okay";
};
&usb_host {
status = "okay";
};
&usb_otg {
status = "okay";
};
&wdt {
status = "okay";
};

2
arch/arm/boot/dts/rk3188-radxarock.dts
View file

@ -48,7 +48,7 @@ / {
model = "Radxa Rock";
compatible = "radxa,rock", "rockchip,rk3188";
memory {
memory@60000000 {
device_type = "memory";
reg = <0x60000000 0x80000000>;
};

2
arch/arm/boot/dts/rk3188.dtsi
View file

@ -147,7 +147,7 @@ cru: clock-controller@20000000 {
};
efuse: efuse@20010000 {
compatible = "rockchip,rockchip-efuse";
compatible = "rockchip,rk3188-efuse";
reg = <0x20010000 0x4000>;
#address-cells = <1>;
#size-cells = <1>;

2
arch/arm/boot/dts/rk3228-evb.dts
View file

@ -46,7 +46,7 @@ / {
model = "Rockchip RK3228 Evaluation board";
compatible = "rockchip,rk3228-evb", "rockchip,rk3228";
memory {
memory@60000000 {
device_type = "memory";
reg = <0x60000000 0x40000000>;
};

2
arch/arm/boot/dts/rk3229-evb.dts
View file

@ -46,7 +46,7 @@ / {
model = "Rockchip RK3229 Evaluation board";
compatible = "rockchip,rk3229-evb", "rockchip,rk3229";
memory {
memory@60000000 {
device_type = "memory";
reg = <0x60000000 0x40000000>;
};

6
arch/arm/boot/dts/rk322x.dtsi
View file

@ -44,9 +44,11 @@
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/clock/rk3228-cru.h>
#include <dt-bindings/thermal/thermal.h>
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&gic>;
aliases {
@ -402,7 +404,7 @@ emmc: dwmmc@30020000 {
reg = <0x30020000 0x4000>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <37500000>;
clock-freq-min-max = <400000 37500000>;
max-frequency = <37500000>;
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";

2
arch/arm/boot/dts/rk3288-evb.dtsi
View file

@ -43,7 +43,7 @@
#include "rk3288.dtsi"
/ {
memory {
memory@0 {
device_type = "memory";
reg = <0x0 0x80000000>;
};

2
arch/arm/boot/dts/rk3288-fennec.dts
View file

@ -46,7 +46,7 @@ / {
model = "Rockchip RK3288 Fennec Board";
compatible = "rockchip,rk3288-fennec", "rockchip,rk3288";
memory {
memory@0 {
reg = <0x0 0x80000000>;
device_type = "memory";
};

2
arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
View file

@ -45,7 +45,7 @@
#include "rk3288.dtsi"
/ {
memory {
memory@0 {
device_type = "memory";
reg = <0 0x80000000>;
};

2
arch/arm/boot/dts/rk3288-firefly.dtsi
View file

@ -44,7 +44,7 @@
#include "rk3288.dtsi"
/ {
memory {
memory@0 {
device_type = "memory";
reg = <0 0x80000000>;
};

2
arch/arm/boot/dts/rk3288-miqi.dts
View file

@ -52,7 +52,7 @@ chosen {
stdout-path = "serial2:115200n8";
};
memory {
memory@0 {
device_type = "memory";
reg = <0 0x80000000>;
};

34
arch/arm/boot/dts/rk3288-popmetal.dts
View file

@ -48,7 +48,7 @@ / {
model = "PopMetal-RK3288";
compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288";
memory{
memory@0 {
device_type = "memory";
reg = <0 0x80000000>;
};
@ -68,7 +68,7 @@ gpio-keys {
pinctrl-0 = <&pwrbtn>;
power {
gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
label = "GPIO Key Power";
linux,input-type = <1>;
@ -79,7 +79,7 @@ power {
ir: ir-receiver {
compatible = "gpio-ir-receiver";
gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&ir_int>;
};
@ -94,7 +94,7 @@ vcc_flash: flash-regulator {
vcc_sd: sdmmc-regulator {
compatible = "regulator-fixed";
gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_pwr>;
regulator-name = "vcc_sd";
@ -128,7 +128,7 @@ vcc18_dvp: vcc18-dvp-regulator {
vcc28_dvp: vcc28-dvp-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>;
gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&dvp_pwr>;
regulator-name = "vcc28_dvp";
@ -147,6 +147,8 @@ &emmc {
bus-width = <8>;
cap-mmc-highspeed;
disable-wp;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
@ -165,6 +167,10 @@ &sdmmc {
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-sdr104;
vmmc-supply = <&vcc_sd>;
vqmmc-supply = <&vccio_sd>;
status = "okay";
@ -174,7 +180,7 @@ &gmac {
phy-supply = <&vcc_lan>;
phy-mode = "rgmii";
clock_in_out = "input";
snps,reset-gpio = <&gpio4 7 0>;
snps,reset-gpio = <&gpio4 RK_PB0 0>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 1000000>;
assigned-clocks = <&cru SCLK_MAC>;
@ -280,7 +286,7 @@ regulator-state-mem {
vccio_sd: LDO_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vccio_sd";
regulator-state-mem {
@ -443,43 +449,43 @@ &io_domains {
&pinctrl {
ak8963 {
comp_int: comp-int {
rockchip,pins = <8 1 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <8 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
buttons {
pwrbtn: pwrbtn {
rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
dvp {
dvp_pwr: dvp-pwr {
rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
ir {
ir_int: ir-int {
rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
mma8452 {
gsensor_int: gsensor-int {
rockchip,pins = <8 0 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <8 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
pmic {
pmic_int: pmic-int {
rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
sdmmc {
sdmmc_pwr: sdmmc-pwr {
rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

2
arch/arm/boot/dts/rk3288-r89.dts
View file

@ -48,7 +48,7 @@
/ {
compatible = "netxeon,r89", "rockchip,rk3288";
memory {
memory@0 {
device_type = "memory";
reg = <0x0 0x80000000>;
};

2
arch/arm/boot/dts/rk3288-rock2-som.dtsi
View file

@ -42,7 +42,7 @@
#include "rk3288.dtsi"
/ {
memory {
memory@0 {
reg = <0x0 0x80000000>;
device_type = "memory";
};

2
arch/arm/boot/dts/rk3288-veyron.dtsi
View file

@ -47,7 +47,7 @@
#include "rk3288.dtsi"
/ {
memory {
memory@0 {
device_type = "memory";
reg = <0x0 0x80000000>;
};

14
arch/arm/boot/dts/rk3288.dtsi
View file

@ -46,9 +46,11 @@
#include <dt-bindings/thermal/thermal.h>
#include <dt-bindings/power/rk3288-power.h>
#include <dt-bindings/soc/rockchip,boot-mode.h>
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "rockchip,rk3288";
interrupt-parent = <&gic>;
@ -227,7 +229,7 @@ display-subsystem {
sdmmc: dwmmc@ff0c0000 {
compatible = "rockchip,rk3288-dw-mshc";
clock-freq-min-max = <400000 150000000>;
max-frequency = <150000000>;
clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
@ -239,7 +241,7 @@ sdmmc: dwmmc@ff0c0000 {
sdio0: dwmmc@ff0d0000 {
compatible = "rockchip,rk3288-dw-mshc";
clock-freq-min-max = <400000 150000000>;
max-frequency = <150000000>;
clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>,
<&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
@ -251,7 +253,7 @@ sdio0: dwmmc@ff0d0000 {
sdio1: dwmmc@ff0e0000 {
compatible = "rockchip,rk3288-dw-mshc";
clock-freq-min-max = <400000 150000000>;
max-frequency = <150000000>;
clocks = <&cru HCLK_SDIO1>, <&cru SCLK_SDIO1>,
<&cru SCLK_SDIO1_DRV>, <&cru SCLK_SDIO1_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
@ -263,7 +265,7 @@ sdio1: dwmmc@ff0e0000 {
emmc: dwmmc@ff0f0000 {
compatible = "rockchip,rk3288-dw-mshc";
clock-freq-min-max = <400000 150000000>;
max-frequency = <150000000>;
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
@ -1116,7 +1118,7 @@ gic: interrupt-controller@ffc01000 {
};
efuse: efuse@ffb40000 {
compatible = "rockchip,rockchip-efuse";
compatible = "rockchip,rk3288-efuse";
reg = <0xffb40000 0x20>;
#address-cells = <1>;
#size-cells = <1>;

4
arch/arm/boot/dts/rk3xxx.dtsi
View file

@ -44,9 +44,11 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/rockchip,boot-mode.h>
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&gic>;
aliases {

8
include/dt-bindings/clock/rk3188-cru-common.h
View file

@ -72,6 +72,8 @@
#define ACLK_IPP 200
#define ACLK_RGA 201
#define ACLK_CIF0 202
#define ACLK_CPU 203
#define ACLK_PERI 204
/* pclk gates */
#define PCLK_GRF 320
@ -104,6 +106,8 @@
#define PCLK_EFUSE 347
#define PCLK_TZPC 348
#define PCLK_TSADC 349
#define PCLK_CPU 350
#define PCLK_PERI 351
/* hclk gates */
#define HCLK_SDMMC 448
@ -126,8 +130,10 @@
#define HCLK_IPP 465
#define HCLK_RGA 466
#define HCLK_NANDC0 467
#define HCLK_CPU 468
#define HCLK_PERI 469
#define CLK_NR_CLKS (HCLK_NANDC0 + 1)
#define CLK_NR_CLKS (HCLK_PERI + 1)
/* soft-reset indices */
#define SRST_MCORE 2

33
include/dt-bindings/pinctrl/rockchip.h
View file

@ -25,6 +25,39 @@
#define RK_GPIO4 4
#define RK_GPIO6 6
#define RK_PA0 0
#define RK_PA1 1
#define RK_PA2 2
#define RK_PA3 3
#define RK_PA4 4
#define RK_PA5 5
#define RK_PA6 6
#define RK_PA7 7
#define RK_PB0 8
#define RK_PB1 9
#define RK_PB2 10
#define RK_PB3 11
#define RK_PB4 12
#define RK_PB5 13
#define RK_PB6 14
#define RK_PB7 15
#define RK_PC0 16
#define RK_PC1 17
#define RK_PC2 18
#define RK_PC3 19
#define RK_PC4 20
#define RK_PC5 21
#define RK_PC6 22
#define RK_PC7 23
#define RK_PD0 24
#define RK_PD1 25
#define RK_PD2 26
#define RK_PD3 27
#define RK_PD4 28
#define RK_PD5 29
#define RK_PD6 30
#define RK_PD7 31
#define RK_FUNC_GPIO 0
#define RK_FUNC_1 1
#define RK_FUNC_2 2