cciss: factor out cciss_wait_for_board_ready()
cciss: factor out cciss_wait_for_board_ready() Signed-off-by: Stephen M. Cameron <scameron@beardog.cce.hp.com> Signed-off-by: Jens Axboe <jaxboe@fusionio.com>
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@ -4026,9 +4026,23 @@ static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
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return -ENODEV;
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}
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static int __devinit cciss_wait_for_board_ready(ctlr_info_t *h)
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{
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int i;
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u32 scratchpad;
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for (i = 0; i < CCISS_BOARD_READY_ITERATIONS; i++) {
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scratchpad = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
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if (scratchpad == CCISS_FIRMWARE_READY)
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return 0;
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msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
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}
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dev_warn(&h->pdev->dev, "board not ready, timed out.\n");
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return -ENODEV;
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}
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static int __devinit cciss_pci_init(ctlr_info_t *c)
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{
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__u32 scratchpad = 0;
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__u64 cfg_offset;
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__u32 cfg_base_addr;
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__u64 cfg_base_addr_index;
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@ -4073,21 +4087,9 @@ static int __devinit cciss_pci_init(ctlr_info_t *c)
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if (err)
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goto err_out_free_res;
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c->vaddr = remap_pci_mem(c->paddr, 0x250);
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/* Wait for the board to become ready. (PCI hotplug needs this.)
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* We poll for up to 120 secs, once per 100ms. */
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for (i = 0; i < 1200; i++) {
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scratchpad = readl(c->vaddr + SA5_SCRATCHPAD_OFFSET);
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if (scratchpad == CCISS_FIRMWARE_READY)
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break;
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set_current_state(TASK_INTERRUPTIBLE);
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schedule_timeout(msecs_to_jiffies(100)); /* wait 100ms */
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}
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if (scratchpad != CCISS_FIRMWARE_READY) {
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printk(KERN_WARNING "cciss: Board not ready. Timed out.\n");
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err = -ENODEV;
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err = cciss_wait_for_board_ready(c);
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if (err)
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goto err_out_free_res;
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}
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/* get the address index number */
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cfg_base_addr = readl(c->vaddr + SA5_CTCFG_OFFSET);
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@ -190,6 +190,21 @@ struct ctlr_info
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#define CCISS_INTR_ON 1
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#define CCISS_INTR_OFF 0
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/* CCISS_BOARD_READY_WAIT_SECS is how long to wait for a board
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* to become ready, in seconds, before giving up on it.
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* CCISS_BOARD_READY_POLL_INTERVAL_MSECS * is how long to wait
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* between polling the board to see if it is ready, in
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* milliseconds. CCISS_BOARD_READY_ITERATIONS is derived
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* the above.
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*/
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#define CCISS_BOARD_READY_WAIT_SECS (120)
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#define CCISS_BOARD_READY_POLL_INTERVAL_MSECS (100)
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#define CCISS_BOARD_READY_ITERATIONS \
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((CCISS_BOARD_READY_WAIT_SECS * 1000) / \
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CCISS_BOARD_READY_POLL_INTERVAL_MSECS)
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/*
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Send the command to the hardware
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*/
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