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ARM: dts: keystone-k2g-evm: add HDMI and analog audio data
The board is using McASP2 for both analog (tlv320aic3106) and HDMI (SiI9022) audio. 12.288MHz oscillator provides the MCLK for both aic3106 and SiI9022. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
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@ -46,6 +46,14 @@ vcc1v8_ldo1_reg: fixedregulator-vcc1v8-ldo1 {
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regulator-always-on;
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};
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vcc1v8_ldo2_reg: fixedregulator-vcc1v8-ldo2 {
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compatible = "regulator-fixed";
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regulator-name = "ldo2";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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hdmi: connector {
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compatible = "hdmi-connector";
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label = "hdmi";
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@ -58,6 +66,57 @@ hdmi_connector_in: endpoint {
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};
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};
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};
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aud_mclk: aud_mclk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <12288000>;
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};
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sound0: sound@0 {
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compatible = "simple-audio-card";
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simple-audio-card,name = "K2G-EVM";
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simple-audio-card,widgets =
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"Headphone", "Headphone Jack",
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"Line", "Line In";
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simple-audio-card,routing =
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"Headphone Jack", "HPLOUT",
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"Headphone Jack", "HPROUT",
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"LINE1L", "Line In",
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"LINE1R", "Line In";
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simple-audio-card,dai-link@0 {
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format = "i2s";
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bitclock-master = <&sound0_0_master>;
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frame-master = <&sound0_0_master>;
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sound0_0_master: cpu {
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sound-dai = <&mcasp2>;
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clocks = <&k2g_clks 0x6 1>;
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system-clock-direction-out;
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};
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codec {
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sound-dai = <&tlv320aic3106>;
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clocks = <&aud_mclk>;
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};
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};
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simple-audio-card,dai-link@1 {
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format = "i2s";
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bitclock-master = <&sound0_1_master>;
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frame-master = <&sound0_1_master>;
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sound0_1_master: cpu {
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sound-dai = <&mcasp2>;
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clocks = <&k2g_clks 0x6 1>;
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system-clock-direction-out;
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};
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codec {
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sound-dai = <&sii9022>;
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clocks = <&aud_mclk>;
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};
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};
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};
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};
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&k2g_pinctrl {
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@ -214,6 +273,15 @@ K2G_CORE_IOPAD(0x10e4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssde.dssd
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K2G_CORE_IOPAD(0x10e8) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssfid.dssfid */
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>;
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};
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mcasp2_pins: pinmux_mcasp2_pins {
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pinctrl-single,pins = <
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K2G_CORE_IOPAD(0x1234) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE4) /* pr0_pru_gpo2.mcasp2_axr2 */
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K2G_CORE_IOPAD(0x1238) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE4) /* pr0_pru_gpo3.mcasp2_axr3 */
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K2G_CORE_IOPAD(0x1254) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE4) /* pr0_pru_gpo10.mcasp2_afsx */
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K2G_CORE_IOPAD(0x125c) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE4) /* pr0_pru_gpo12.mcasp2_aclkx */
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>;
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};
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};
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&uart0 {
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@ -423,6 +491,10 @@ sii9022: sii9022@3b {
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compatible = "sil,sii9022";
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reg = <0x3b>;
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sil,i2s-data-lanes = < 0 >;
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clocks = <&aud_mclk>;
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clock-names = "mclk";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -444,6 +516,19 @@ sii9022_out: endpoint {
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};
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};
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};
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tlv320aic3106: tlv320aic3106@1b {
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#sound-dai-cells = <0>;
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compatible = "ti,tlv320aic3106";
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reg = <0x1b>;
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status = "okay";
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/* Regulators */
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AVDD-supply = <&vcc3v3_dcin_reg>;
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IOVDD-supply = <&vcc3v3_dcin_reg>;
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DRVDD-supply = <&vcc3v3_dcin_reg>;
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DVDD-supply = <&vcc1v8_ldo2_reg>;
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};
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};
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&dss {
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@ -458,3 +543,30 @@ dpi_out: endpoint {
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};
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};
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};
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&k2g_clks {
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/* on the board 22.5792MHz is connected to AUDOSC_IN */
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assigned-clocks = <&k2g_clks 0x4c 2>;
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assigned-clock-rates = <22579200>;
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};
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&mcasp2 {
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#sound-dai-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&mcasp2_pins>;
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assigned-clocks = <&k2g_clks 0x6 1>;
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assigned-clock-parents = <&k2g_clks 0x6 2>;
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status = "okay";
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op-mode = <0>; /* MCASP_IIS_MODE */
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tdm-slots = <2>;
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/* 6 serializer */
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serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
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0 0 1 2 0 0 // AXR2: TX, AXR3: rx
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>;
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tx-num-evt = <32>;
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rx-num-evt = <32>;
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};
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